Datasheet AD10465 (Analog Devices) - 7

AD10465 Data Sheet TEST CIRCUITS tA N+3 N AIN N+1 N+2 N+4 tENC tENCH tENCL ENC, ENC N N+1 N+2 N+3 N+4 t t E, DR OD D[13:0] N–3 N–2 N–1 N
-015
DRY
356 02 Figure 2. Timing Diagram
AVIN3 DVCC 200Ω AVIN2 CURRENT MIRROR 100Ω AVIN1 TO AD8037 100Ω
16 0 6- 35
DV
02
CC
Figure 3. Analog Input Stage
VREF DR_OUT LOADS AV AV CC CC AV AV CC CC 10kΩ 10kΩ CURRENT MIRROR ENCODE ENCODE
18 0 6- 35 02
10kΩ 10kΩ
Figure 5. Digital Output Stage 17 0 6-
LOADS
35 02
DVCC
Figure 4. ENCODE Inputs
CURRENT MIRROR DVCC VREF 100Ω D0 TO D13 CURRENT MIRROR
19 0 6- 35 02 Figure 6. Digital Output Stage Rev. B | Page 6 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TEST CIRCUITS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION USING THE FLEXIBLE INPUT APPLYING THE AD10465 ENCODING THE AD10465 JITTER CONSIDERATIONS POWER SUPPLIES OUTPUT LOADING LAYOUT INFORMATION EVALUATION BOARD BILL OF MATERIALS LIST FOR AD10465 EVALUATION BOARD SILKSCREENS OUTLINE DIMENSIONS ORDERING GUIDE