Datasheet AD9432 (Analog Devices) - 4

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AD9432 SPECIFICATIONS
VDD = 3.3 V, VCC = 5.0 V; external reference; differential encode input, unless otherwise noted.
Table 1. Test 80 MSPS 105 MSPS Parameter Temp Level Min Typ Max Min Typ Max Unit
RESOLUTION 12 12 Bits DC ACCURACY Differential Nonlinearity (DNL) 25°C I −0.75 ±0.25 +0.75 −0.75 ±0.25 +0.75 LSB Full VI −1.0 ±0.5 +1.0 −1.0 ±0.5 +1.0 LSB Integral Nonlinearity (INL) 25°C I −1.0 ±0.5 +1.0 −1.0 ±0.5 +1.0 LSB Full VI −1.5 ±1.0 +1.5 −1.5 ±1.0 +1.5 LSB No Missing Codes Full VI Guaranteed Guaranteed Gain Error1 25°C I −5 +2 +7 −5 +2 +7 % FS Gain Tempco1 Full V 150 150 ppm/°C ANALOG INPUTS (AIN, AIN) Input Voltage Range Full V 2 2 V p-p Common-Mode Voltage Full V 3.0 3.0 V Input Offset Voltage Full VI −5 ±0 +5 −5 ±0 +5 mV Input Resistance Full VI 2 3 4 2 3 4 kΩ Input Capacitance 25°C V 4 4 pF Analog Bandwidth, Full Power 25°C V 500 500 MHz ANALOG REFERENCE Output Voltage Full VI 2.4 2.5 2.6 2.4 2.5 2.6 V Tempco Full V 50 50 ppm/°C Input Bias Current Full VI 15 50 15 50 μΑ SWITCHING PERFORMANCE Maximum Conversion Rate Full VI 80 105 MSPS Minimum Conversion Rate Full IV 1 1 MSPS Encode Pulse Width High (tEH) 25°C IV 4.0 6.2 4.0 4.8 ns Encode Pulse Width Low (tEL) 25°C IV 4.0 6.2 4.0 4.8 ns Aperture Delay (tA) 25°C V 2.0 2.0 ns Aperture Uncertainty (Jitter) 25°C V 0.25 0.25 ps rms Output Valid Time (tV)2 Full VI 3.0 5.3 3.0 5.3 ns Output Propagation Delay (tPD)2 Full VI 5.5 8.0 5.5 8.0 ns Output Rise Time (tR)2 Full V 2.1 2.1 ns Output Fall Time (tF)2 Full V 1.9 1.9 ns Out-of-Range Recovery Time 25°C V 2 2 ns Transient Response Time 25°C V 2 2 ns Latency Full IV 10 10 Cycles DIGITAL INPUTS Encode Input Common Mode Full V 1.6 1.6 V Differential Input Full V 750 750 mV (ENCODE, ENCODE) Single-Ended Input Logic 1 Voltage Full IV 2.0 2.0 V Logic 0 Voltage Full IV 0.8 0.8 V Input Resistance Full VI 3 5 8 3 5 8 kΩ Input Capacitance 25°C V 4.5 4.5 pF DIGITAL OUTPUTS Logic 1 Voltage (VDD = 3.3 V) Full VI VDD − 0.05 VDD − 0.05 V Logic 0 Voltage (VDD = 3.3 V) Full VI 0.05 0.05 V Output Coding Twos complement Twos complement Rev. F | Page 3 of 16 Document Outline FEATURES APPLICATIONS GENERAL INTRODUCTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT ENCODE INPUT ENCODE VOLTAGE LEVEL DEFINITION DIGITAL OUTPUTS VOLTAGE REFERENCE TIMING APPLICATIONS INFORMATION USING THE AD8138 TO DRIVE THE AD9432 OUTLINE DIMENSIONS ORDERING GUIDE