Datasheet AD9203 (Analog Devices) - 7

AD9203 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DRVSS 1 28 AVDD DRVDD 2 27 AVSS (LSB) D0 3 26 AINN D1 4 25 AINP D2 5 24 REFBF D3 6 AD9203 23 VREF D4 TOP VIEW 7 22 REFTF (Not to Scale) D5 8 21 PWRCON D6 9 20 CLAMPIN D7 10 19 CLAMP D8 11 18 REFSENSE (MSB) D9 12 17 STBY OTR 13 16 3-STATE DFS 14 15 CLK
00573-003 Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin Name Description
1 DRVSS Digital Ground. 2 DRVDD Digital Supply. 3 D0 Bit 0, Least Significant Bit. 4 D1 Bit 1. 5 D2 Bit 2. 6 D3 Bit 3. 7 D4 Bit 4. 8 D5 Bit 5. 9 D6 Bit 6. 10 D7 Bit 7. 11 D8 Bit 8. 12 D9 Bit 9, Most Significant Bit. 13 OTR Out-of-Range Indicator. 14 DFS Data Format Select HI: Twos Complement; LO: Straight Binary. 15 CLK Clock Input. 16 3-STATE HI: High Impedance State Output; LO: Active Digital Output Drives. 17 STBY HI: Power-Down Mode; LO: Normal Operation. 18 REFSENSE Reference Select. 19 CLAMP HI: Enable Clamp; LO: Open Clamp. 20 CLAMPIN Clamp Signal Input. 21 PWRCON Power Control Input. 22 REFTF Top Reference Decoupling. 23 VREF Reference In/Out. 24 REFBF Bottom Reference Decoupling. 25 AINP Noninverting Analog Input. 26 AINN Inverting Analog Input. 27 AVSS Analog Ground. 28 AVDD Analog Supply. Rev. B | Page 6 of 28 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS OPERATIONS THEORY OF OPERATION OPERATIONAL MODES INPUT AND REFERENCE OVERVIEW INTERNAL REFERENCE CONNECTION EXTERNAL REFERENCE OPERATION CLAMP OPERATION DRIVING THE ANALOG INPUT OP AMP SELECTION GUIDE DIFFERENTIAL MODE OF OPERATION POWER CONTROL INTERFACING TO 5 V SYSTEMS CLOCK INPUT AND CONSIDERATIONS DIGITAL INPUTS AND OUTPUTS APPLICATIONS DIRECT IF DOWN CONVERSION ULTRASOUND APPLICATIONS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE