AD6640* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017COMPARABLE PARTSDESIGN RESOURCES View a parametric search of comparable parts. • AD6640 Material Declaration • PCN-PDN Information DOCUMENTATION • Quality And Reliability Application Notes • Symbols and Footprints • AN-297: Test Video A/D Converters Under Dynamic Conditions DISCUSSIONS • AN-835: Understanding High Speed ADC Testing and View all AD6640 EngineerZone Discussions. Evaluation Data SheetSAMPLE AND BUY • AD6640: 12-Bit, 65 MSPS IF Sampling A/D Converter Data Visit the product page to see pricing options. Sheet TECHNICAL SUPPORTREFERENCE MATERIALS Submit a technical question or find your regional support Technical Articles number. • Correlating High-Speed ADC Performance to Multicarrier 3G Requirements DOCUMENT FEEDBACK • Designing a Super-Heterodyne Multi-Channel Digital Receiver Submit feedback for this data sheet. • DNL and Some of its Effects on Converter Performance • MS-2210: Designing Power Supplies for High Speed ADC This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS AC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Analog Bandwidth (Small Signal) Aperture Delay Aperture Uncertainty (Jitter) Differential Nonlinearity Encode Pulsewidth/Duty Cycle Integral Nonlinearity Minimum Conversion Rate Maximum Conversion Rate Output Propagation Delay Power Supply Rejection Ratio Signal-to-Noise-and-Distortion (SINAD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) Two-Tone Intermodulation Distortion Rejection Two-Tone SFDR Worst Harmonic Equivalent Circuits Typical Performance Characteristics THEORY OF OPERATION APPLYING THE AD6640 Encoding the AD6640 Driving the Analog Input Power Supplies Output Loading Layout Information Evaluation Boards DIGITAL WIDEBAND RECEIVERS Introduction System Description System Requirements Noise Floor and SNR Processing Gain Overcoming Static Nonlinearities with Dither Receiver Example IF Sampling Using the AD6640 as a Mix-Down Stage RECEIVE CHAIN FOR A PHASED-ARRAY CELLULAR BASE STATION OUTLINE DIMENSIONS Revision History
