Datasheet AD9280 (Analog Devices) - 20

AD9280 REFSENSE JP1 JP10 JP14 AVDD EXTB TP3 AVDD JP2 C3 TP1 0.1
m
F REFBF R5 MODE C5 C4 TP4 10k
V
JP15 JP3 JP9 10/10V + 0.1
m
F REFTF C6 R6 JP4 0.1
m
F 10k
V
VREF B TP5 GND JP16 1 S5 EXTT 2 3 CLAMPIN TP6 JP11 GND A EXTT JP6 REFTS GND JP22 JP12 C35 C36 C37 C38 AVDD AVDDCLK TP7 10/10V 0.1
m
F 0.1
m
F 0.1
m
F REFBS R35 4.99k
V
JP7 JP13 GND EXTB R34 2k
V
CW T1–1T AIN U6 U6 1 2 5 6 J1 A 3 R36 2 3 4 4.99k
V
S8 2 1 B TP12 R1 TP8 1 B 49.9
V
6 S6 2 P C30 1 B JP8 1 3 S REFBS 0.1
m
F S7 2 T1 TP9 A R51 JP26 R2 3 J5 49.9
V
C1 100
V
A 0.1
m
F CM ADC_CLK CLK TP10 A R3 R4 2 DCIN TP13 3 100
V
49.9
V
R52 U6 S1 49.9
V
C2 1 3 4 DUTCLK 47/10V B TP29 L4 J9 +3–5D C32 C31 0.1
m
F 10/10V TP20 U6 DECOUPLING L1 AVDDCLK 9 U6 8 J2 DRVDD C22 C23 0.1
m
F 10/10V 14 11 U6 10 TP21 74AHC14 PWR L2 C28 U6 U6 J3 0.1
m
F 13 12 AVDD GND C24 C25 0.1
m
F 33/16V 7 TP22 L3 J4 +3–5A C26 C27 0.1
m
F 10/10V TP23 TP24 TP25 TP26 TP27 TP28 GND J6 GND J10
Figure 39b. Evaluation Board Schematic REV. E –19– Document Outline FEATURES PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM AD9280-SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL CHARACTERIZATION CURVES APPLYING THE AD9280 Theory of Operation Operational Modes Summary of Modes Voltage Reference Reference Buffer Analog Input Special Input and Reference Overview REFERENCE OPERATION Internal Reference Operation External Reference Operation STANDBY OPERATION CLAMP OPERATION Clamp Circuit Example DRIVING THE ANALOG INPUT DIFFERENTIAL INPUT OPERATION AD876-8 MODE OF OPERATION CLOCK INPUT DIGITAL INPUTS AND OUTPUTS APPLICATIONS Direct IF Down Conversion Using the AD9280 Grounding and Layout Rules Digital Outputs Three-State Outputs OUTLINE DIMENSIONS Ordering Guide REVISION HISTORY