Datasheet AD5380 (Analog Devices) - 5

AD5380 Data Sheet GENERAL DESCRIPTION
The AD5380 is a complete, single-supply, 40-channel, 14-bit An input register followed by a DAC register provides double denseDAC® available in a 100-lead LQFP package. All 40 buffering, allowing the DAC outputs to be updated channels have an on-chip output amplifier with rail-to-rail independently or simultaneously using the LDAC input. operation. The AD5380 includes a programmable internal Each channel has a programmable gain and offset adjust register 1.25 V/2.5 V, 10 ppm/°C reference, an on-chip channel monitor that al ows the user to fully calibrate any DAC channel. Power function that multiplexes the analog outputs to a common consumption is typically 0.25 mA/channel with boost off. MON_OUT pin for external monitoring, and an output amplifier boost mode that al ows optimization of the amplifier slew rate. The AD5380 contains a double-buffered parallel interface that features a 20 ns WR pulse width, an SPI-, QSPI-, -MICROWIRE, -DSP compatible serial interface with interface speeds in excess of 30 MHz, and an I2C-compatible interface that supports a 400 kHz data transfer rate. Rev. D | Page 4 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table Of Contents Revision History General Description Specifications AD5380-5 Specifications AD5380-3 Specifications AC Characteristics Timing Characteristics Serial Interface I2C Serial Interface Parallel Interface Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write CLR Code Soft CLR Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions RESET\ Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down AD5380 Interfaces DSP-, SPI-, Microwire-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer START and STOP Conditions Repeated START Conditions Acknowledge Bit (ACK) AD5380 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pins A5 to A0 Pins DB13 to DB0 Microprocessor Interfacing Parallel Interface AD5380 to MC68HC11 AD5380 to PIC16C6x/7x AD5380 to 8051 AD5380 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit AD5380 Monitor Function Toggle Mode Function Thermal Monitor Function AD5380 in a MEMS Based Optical Switch Optical Attenuators Utilizing the AD5380 FIFO Outline Dimensions Ordering Guide