Datasheet ADA4939-1/ADA4939-2 (Analog Devices) - 2

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ADA4939-1/ADA4939-2 Data Sheet TABLE OF CONTENTS
Features .. 1  Theory of Operation .. 17  Applications ... 1  Analyzing an Application Circuit .. 17  General Description ... 1  Setting the Closed-Loop Gain .. 17  Functional Block Diagrams ... 1  Stable for Gains ≥2 ... 17  Revision History ... 2  Estimating the Output Noise Voltage .. 17  Specifications ... 3  Impact of Mismatches in the Feedback Networks ... 18  5 V Operation ... 3  Calculating the Input Impedance for an Application Circuit 3.3 V Operation .. 5  ... 19  Absolute Maximum Ratings .. 7  Input Common-Mode Voltage Range ... 21  Thermal Resistance .. 7  Input and Output Capacitive AC Coupling .. 21  Maximum Power Dissipation ... 7  Minimum RG Value of 50 Ω .. 21  ESD Caution .. 7  Setting the Output Common-Mode Voltage .. 21  Pin Configurations and Function Descriptions ... 8  Layout, Grounding, and Bypassing .. 22  Typical Performance Characteristics ... 9  High Performance ADC Driving ... 23  Test Circuits ... 15  Outline Dimensions ... 24  Operational Description .. 16  Ordering Guide .. 24  Definition of Terms .. 16 
REVISION HISTORY 5/2016—Rev. 0 to Rev. A
Changed ADA4939 to ADA4939-1/ADA4939-2, CP-16-2 to CP-16-21, and CP-24-1 to CP-24-10 ... Throughout Changes to Figure 5, Figure 6, Table 9, and Table 10 ... 8 Changes to Figure 54 .. 23 Updated Outline Dimensions ... 24 Changes to Ordering Guide .. 24
5/2008—Revision 0: Initial Version
Rev. A | Page 2 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 3.3 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OPERATIONAL DESCRIPTION DEFINITION OF TERMS Differential Voltage Common-Mode Voltage Balance THEORY OF OPERATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN STABLE FOR GAINS ≥2 ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE INPUT AND OUTPUT CAPACITIVE AC COUPLING MINIMUM RG VALUE OF 50 Ω SETTING THE OUTPUT COMMON-MODE VOLTAGE LAYOUT, GROUNDING, AND BYPASSING HIGH PERFORMANCE ADC DRIVING OUTLINE DIMENSIONS ORDERING GUIDE