Datasheet AD8139 (Analog Devices) - 3

link to page 1 link to page 1 link to page 1 link to page 1 link to page 3 link to page 4 link to page 4 link to page 6 link to page 8 link to page 8 link to page 8 link to page 9 link to page 10 link to page 19 link to page 20 link to page 20 link to page 21 link to page 21 link to page 21 link to page 26 link to page 27
AD8139 Data Sheet TABLE OF CONTENTS
Features .. 1 Pin Configurations and Function Descriptions ..8 Applications ... 1 Typical Performance Characteristics ..9 General Description ... 1 Test Circuits ... 18 Functional Block Diagrams ... 1 Theory of Operation .. 19 Revision History ... 2 Typical Connection and Definition of Terms .. 19 Specifications ... 3 Applications Information .. 20 VS = ±5 V, VOCM = 0 V .. 3 Estimating Noise, Gain, and Bandwidth with Matched V Feedback Networks .. 20 S = 5 V, VOCM = 2.5 V ... 5 Absolute Maximum Ratings .. 7 Outline Dimensions ... 25 Thermal Resistance .. 7 Ordering Guide .. 26 ESD Caution .. 7
REVISION HISTORY 6/2016—Rev. B to Rev. C 8/2004—Rev. 0 to Rev. A
Changed CP-8-2 to CP-8-13 .. Throughout Added 8-Lead LFCSP ... Universal Changes to Figure 1 and Figure 2 ... 1 Changes to General Description Section ... 1 Changes to Figure 5, Figure 6, and Table 5 ... 8 Changes to Figure 2 ... 1 Updated Outline Dimensions ... 25 Changes to VS = ±5 V, VOCM = 0 V Specifications ... 3 Changes to Ordering Guide ... 26 Changes to VS = 5 V, VOCM = 2.5 V Specifications ... 5 Changes to Table 4 ... 7
10/2007—Rev. A to Rev. B
Changes to Maximum Power Dissipation Section .. 7 Changes to General Description Section .. 1 Changes to Figure 26 and Figure 29... 12 Added Figure 2; Renumbered Sequentially .. 1 Added Figure 39 and Figure 42; Renumbered Sequentially ... 14 Changes to Table 1 .. 3 Changes to Figure 45 to Figure 47 .. 15 Changes to Table 2 .. 5 Added Figure 48 ... 15 Changes to Table 6 and Layout ... 8 Changes to Figure 52 and Figure 53... 16 Added Figure 6 .. 8 Changes to Figure 55 and Figure 56... 17 Changes to Figure 30 .. 12 Changes to Table 6 .. 19 Changes to Layout .. 17 Changes to Voltage Gain Section ... 19 Changes to Figure 63 .. 22 Changes to Driving a Capacitive Load Section .. 22 Changes to Exposed Paddle (EP) Section ... 23 Changes to Ordering Guide .. 24 Updated Outline Dimensions ... 24 Updated Outline Dimensions ... 24
5/2004—Revision 0: Initial Version
Rev. C | Page 2 of 26 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS VS = ±5 V, VOCM = 0 V VS = 5 V, VOCM = 2.5 V ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION TYPICAL CONNECTION AND DEFINITION OF TERMS Output Balance APPLICATIONS INFORMATION ESTIMATING NOISE, GAIN, AND BANDWIDTH WITH MATCHED FEEDBACK NETWORKS Estimating Output Noise Voltage Voltage Gain Feedback Factor Notation Input Common-Mode Voltage Calculating Input Impedance Input Common-Mode Swing Considerations Bandwidth vs. Closed-Loop Gain Estimating DC Errors Other Impact of Mismatches in the Feedback Networks Driving a Capacitive Load Layout Considerations Terminating a Single-Ended Input Exposed Paddle (EP) OUTLINE DIMENSIONS ORDERING GUIDE