Datasheet ADA4922-1 (Analog Devices) - 4

Data Sheet ADA4922-1 SPECIFICATIONS
VS = ±12 V, TA = 25°C, RL = 1 kΩ, DIS = high, CL = 3 pF, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, VO = 0.2 V p-p, differential 34 38 MHz G = +2, VO = 40 V p-p, differential 6.5 7.2 MHz Overdrive Recovery Time VS+ + 0.5 V to VS− − 0.5 V; +recovery/−recovery 180/330 ns Slew Rate VO, dm = 2 V step 260 V/µs VO, dm = 40 V step 730 V/µs Settling Time to 0.01% VO, dm = 40 V step 580 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion fC = 5 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −116/−109 dBc fC = 100 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −99/−100 dBc Differential Output Voltage Noise f = 100 kHz 12 nV/√Hz Input Current Noise f = 100 kHz 1.4 pA/√Hz DC PERFORMANCE Differential Output Offset Voltage 0.35 1.1 mV Differential Output Offset Voltage Drift 14 µV/°C Input Bias Current 1.8 3.5 µA Gain 2 V/V Gain Error −0.05 % Gain Error Drift 0.0002 %/°C INPUT CHARACTERISTICS Input Resistance 11 MΩ Input Capacitance 1 pF Input Voltage Range ±10.7 V OUTPUT CHARACTERISTICS Output Voltage Swing Each single-ended output, RL = 1 kΩ ±10.65 ±10.7 V DC Output Current 40 mA Capacitive Load Drive 30% overshoot 20 pF POWER SUPPLY Operating Range 5 26 V Quiescent Current 9.4 10.1 mA Quiescent Current (Disabled) 1.5 2.0 mA Power Supply Rejection Ratio (PSRR) −PSRR −89 −80 dB +PSRR −91 −83 dB DISABLE DIS Input Voltage Threshold Disabled ≤ −11 V Enabled ≥ −9 V Turn-Off Time 160 µs Turn-On Time 78 ns DIS Bias Current Enabled DIS = −9 V 114 µA Disabled DIS = −11 V −125 µA Rev. A | Page 3 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADA4922-1 DIFFERENTIAL OUTPUT NOISE MODEL USING THE REF PIN INTERNAL FEEDBACK NETWORK POWER DISSIPATION DISABLE FEATURE DRIVING A DIFFERENTIAL INPUT ADC PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE