Data SheetAD8253PIN CONFIGURATION AND FUNCTION DESCRIPTIONS–IN 110 +INDGND 29REFAD8253–VS 38+VTOP VIEWSA0(Not to Scale)47OUT 5 A1 -00 56WR 983 06 Figure 5. 10-Lead MSOP (RM-10) Pin Configuration Table 4. Pin Function Descriptions Pin No.MnemonicDescription 1 −IN Inverting Input Terminal. True differential input. 2 DGND Digital Ground. 3 −VS Negative Supply Terminal. 4 A0 Gain Setting Pin (LSB). 5 A1 Gain Setting Pin (MSB). 6 WR Write Enable. 7 OUT Output Terminal. 8 +VS Positive Supply Terminal. 9 REF Reference Voltage Terminal. 10 +IN Noninverting Input Terminal. True differential input. Rev. B | Page 7 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ANALOG-TO-DIGITAL CONVERTER APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE
