Datasheet LTC2323-12 (Analog Devices) - 10

LTC2323-12
FUNCTIONAL BLOCK DIAGRAM
VDD 1,8 LDO VBYP1 13 AIN1+ 7 + LVDS/CMOS SDO1+ 15 12-BIT + SIGN TRI-STATE S/H SAR ADC SDO1– A SERIAL OUTPUT 16 IN1– 6 – 28 REFINT REFOUT1 GND 12 G 4, 5, 10, 29 1.2V REF OVDD 14 REFOUT2 26 G CLKOUT+ CNV TIMING CONTROL OUTPUT 17 9 LOGIC CLOCK DRIVER CLKOUT– 18 SCK+ LVDS/CMOS 21 RECEIVERS SCK– 22 A 2 IN2+ + LVDS/CMOS SDO2+ 19 12-BIT +SIGN TRI-STATE S/H SAR ADC SDO2– A SERIAL OUTPUT 20 IN2– 3 – VDD 1,8 VBYP2 24 LDO 232312 BD
TIMING DIAGRAM
ACQUISITION CONVERSION AND READOUT ACQUISITION CNV SCK HI-Z HI-Z B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 0 SDO CLKOUT 232312 TD SERIAL DATA BITS B[12:0] CORRESPOND TO PREVIOUS CONVERSION 232312fb 10 For more information www.linear.com/LTC2323-12 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts