Datasheet MCP6V31, MCP6V31U, MCP6V32, MCP6V34 (Microchip)

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MCP6V31/1U/2/4 23 µA, 300 kHz Zero-Drift Op Amps Features: Description:
• High DC Precision: The Microchip Technology Inc. MCP6V31/1U/2/4 - V family of operational amplifiers provides input offset OS Drift: ±50 nV/°C (maximum) - V voltage correction for very low offset and offset drift. OS: ±8 µV (maximum) These are low-power devices, with a gain bandwidth - AOL: 120 dB (minimum, VDD = 5.5V) product of 300 kHz (typical). They are unity gain stable, - PSRR: 120 dB (minimum, VDD = 5.5V) have virtually no 1/f noise, and have good Power - CMRR: 120 dB (minimum, VDD = 5.5V) Supply Rejection Ratio (PSRR) and Common Mode - Eni: 1.0 µVP-P (typical), f = 0.1 Hz to 10 Hz Rejection Ratio (CMRR). These products operate with - E a single supply voltage as low as 1.8V, while drawing ni: 0.33 µVP-P (typical), f = 0.01 Hz to 1 Hz 23 µA/amplifier (typical) of quiescent current. • Low Power and Supply Voltages: - I The Microchip Technology Inc. MCP6V31/1U/2/4 op Q: 23 µA/amplifier (typical) amps are offered in single (MCP6V31 and - Wide Supply Voltage Range: 1.8V to 5.5V MCP6V31U), dual (MCP6V32) and quad (MCP6V34) • Smal Packages: packages. They were designed using an advanced - Singles in SC70, SOT-23 CMOS process. - Duals in MSOP-8, 2×3 TDFN - Quads in TSSOP-14
Package Types
• Easy to Use:
MCP6V31 MCP6V32
- Rail-to-Rail Input/Output SOT-23 MSOP - Gain Bandwidth Product: 300 kHz (typical) - Unity Gain Stable V 1 5 V V OUT DD V 1 8 OUTA DD • Extended Temperature Range: -40°C to +125°C V V SS 2 VINA– 2 7 OUTB V V 3 6 V IN+ 3 4 VIN– INA+ INB–
Typical Applications:
VSS 4 5 VINB+ • Portable Instrumentation
MCP6V31U MCP6V32
• Sensor Conditioning SC70, SOT-23 2×3 TDFN * • Temperature Measurement VIN+ 1 5 V VOUTA 1 8 V • DC Offset Correction DD DD V 2 V 2 EP 7 V • Medical Instrumentation SS INA– OUTB V 9 IN– 3 4 VOUT VINA+ 3 6 VINB–
Design Aids:
VSS 4 5 VINB+ • SPICE Macro Models
MCP6V34
• FilterLab® Software TSSOP • Microchip Advanced Part Selector (MAPS) V 1 14 V OUTA OUTD • Analog Demonstration and Evaluation Boards V V INA– 2 13 IND– • Application Notes VINA+ 3 12 VIND+ VDD 4 11 VSS
Related Parts:
V V INB+ 5 10 INC+ • MCP6V01/2/3: Auto-Zeroed, Spread Clock VINB– 6 9 VINC– V • MCP6V06/7/8: Auto-Zeroed VOUTB 7 8 OUTC • MCP6V26/7/8: Auto-Zeroed, Low Noise * Includes Exposed Thermal Pad (EP); see Table 3-1. • MCP6V11/1U/2/4: Zero-Drift, Low Power  2012-2014 Microchip Technology Inc. DS20005127B-page 1 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage with VCM = VCML. FIGURE 2-5: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMH. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 1.8V. FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR. FIGURE 2-10: PSRR. FIGURE 2-11: DC Open-Loop Gain. FIGURE 2-12: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-13: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-16: Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V. FIGURE 2-17: Input Bias Current vs. Input Voltage (below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-18: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-19: Output Voltage Headroom vs. Output Current. FIGURE 2-20: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. FIGURE 2-23: Power-on Reset Trip Voltage. FIGURE 2-24: Power-on Reset Voltage vs. Ambient Temperature. 2.3 Frequency Response FIGURE 2-25: CMRR and PSRR vs. Frequency. FIGURE 2-26: Open-Loop Gain vs. Frequency with VDD = 1.8V. FIGURE 2-27: Open-Loop Gain vs. Frequency with VDD = 5.5V. FIGURE 2-28: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-29: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-30: Gain Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-31: Closed-Loop Output Impedance vs. Frequency with VDD = 1.8V. FIGURE 2-32: Closed-Loop Output Impedance vs. Frequency with VDD = 5.5V. FIGURE 2-33: Channel-to-Channel Separation vs. Frequency. FIGURE 2-34: Maximum Output Voltage Swing vs. Frequency. 2.4 Input Noise and Distortion FIGURE 2-35: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-36: Input Noise Voltage Density vs. Input Common Mode Voltage. FIGURE 2-37: Inter-Modulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-6). FIGURE 2-38: Inter-Modulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-6). FIGURE 2-39: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 1.8V. FIGURE 2-40: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 5.5V. 2.5 Time Response FIGURE 2-41: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-42: Input Offset Voltage vs. Time at Power Up. FIGURE 2-43: The MCP6V31/1U/2/4 Family Shows No Input Phase Reversal with Overdrive. FIGURE 2-44: Non-inverting Small Signal Step Response. FIGURE 2-45: Non-inverting Large Signal Step Response. FIGURE 2-46: Inverting Small Signal Step Response. FIGURE 2-47: Inverting Large Signal Step Response. FIGURE 2-48: Slew Rate vs. Ambient Temperature. FIGURE 2-49: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-50: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs Against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. 4.3 Application Tips FIGURE 4-7: Output Resistor, RISO, Stabilizes Capacitive Loads. FIGURE 4-8: Recommended RISO values for Capacitive Loads. FIGURE 4-9: Output Load. FIGURE 4-10: Amplifier with Parasitic Capacitance. 4.4 Typical Applications FIGURE 4-11: Simple Design. FIGURE 4-12: RTD Sensor. FIGURE 4-13: Offset Correction. FIGURE 4-14: Precision Comparator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product ID System Trademarks Worldwide Sales and Service