Datasheet LTC4300A-1, LTC4300A-2 (Analog Devices) - 7

LTC4300A-1/LTC4300A-2
BLOCK DIAGRAM (LTC4300A-2) 2-Wire Bus Buffer and Hot Swap Controller
V 8 CC 2mA 2mA SLEW RATE SLEW RATE 1 VCC2 ACC DETECTOR DETECTOR BACKPLANE-TO-CARD SDAIN 6 4 CONNECTION 7 SDAOUT CONNECT CONNECT CONNECT 100k 100k RCH1 RCH3 1V PRECHARGE 100k 100k RCH2 RCH4 2mA 2mA SLEW RATE SLEW RATE 5 ACC ACC DETECTOR DETECTOR BACKPLANE-TO-CARD SCLIN 3 CONNECTION 2 SCLOUT CONNECT CONNECT + – VCC2 – 1V + + – – STOP BIT AND BUS IDLE 0.5μA + 0.55VCC/ – 20pF 0.45VCC 95μs CONNECT CONNECT DELAY, UVLO RD RISING QB ONLY S 4 GND 0.5pF 4300A2 BD 4300a12fa 7