Datasheet LTC4302-1, LTC4302-2 (Analog Devices) - 6

LTC4302-1/LTC4302-2
W BLOCK DIAGRA S LTC4302-1 Addressable 2-Wire Bus Buffer
2mA 2mA SLEW RATE SLEW RATE INACC OUTACC DETECTOR DETECTOR SDAIN SDAOUT BACKPLANE-TO-CARD 1 10 CONNECTION UVLO 100k SDAIN 100k SDAOUT 1V 100k PRECHARGE SCLIN 100k SCLOUT 2mA 2mA SLEW RATE SLEW RATE INACC OUTACC DETECTOR DETECTOR SCLIN SCLOUT BACKPLANE-TO-CARD 2 9 CONNECTION + 100ns GLITCH FILTER 0.55VCC 0.45V – CC CONNECT SDAIN + 100ns GLITCH VCC FILTER OUT CFG2 – 2pF VCC RLIM GPIO2 50k 2-WIRE DIR2 7 DIGITAL DATA IN2 INTERFACE 5-BIT ADDRESS A/D 4 ADDRESS DECODER VCC ADDRESS OUT CFG1 V FIXED BITS CC 8 + “11” 1µs UVLO FILTER 2.5V/ – 2.35V GPIO1 DIR1 6 CONN DATA IN1 3 GND INACC 5 OUTACC 4302 BD1 sn430212 430212fs 6