Datasheet AD652 (Analog Devices) - 5

AD652 AD652JP/AQ/SQ AD652KP/BQ Parameter Min Typ Max Min Typ Max Unit
COMPARATOR Input Bias Current 0.5 5 0.5 5 µA Common-Mode Voltage −VS + 4 + VS − 4 −VS + 4 +VS − 4 V CLOCK INPUT Maximum Frequency
4
5
4
5 MHz Threshold Voltage (Referred to Pin 12) 1.2 1.2 V TMIN to TMAX
0.8 2.0 0.8 2.0
V Input Current (−VS < VCLK < +VS) 5
20
5
20
µA Voltage Range −VS +VS −VS +VS V Rise Time 2 2 µs OUTPUT STAGE VOL (IOUT = 10 mA)
0.4 0.4
V IOL VOL < 0.8 V
15 15
mA VOL < 0.4 V, TMIN to TMAX
8 8
mA IOH (Off Leakage) 0.01
10
0.01
10
µA Delay Time, Positive Clock Edge to Output Pulse
150
200
250 150
200
250
ns Fall Time (Load = 500 pF and ISINK = 5 mA) 100 100 ns Output Capacitance 5 5 pF OUTPUT ONE-SHOT Pulse Width, tOS COS = 300 pF
1
1.5
2
1 1.5
2
µs COS = 1000 pF 4 5 6 4 5 6 µs REFERENCE OUTPUT Voltage
4.950
5.0
5.050 4.975
5.0
5.025
V Drift
100 50
ppm/°C Output Current Source TMIN to TMAX
10 10
mA Sink 100 500 100 500 µA Power Supply Rejection Supply Range = ±12.5 V to ±17.5 V 0.015 0.015 %/V Output Impedance (Sourcing Current) 0.3
2
0.3
2
Ω POWER SUPPLY Rated Voltage ±15 ±15 V Operating Range Dual Supply ±6 ±15 ±18 ±6 ±15 ±18 V Single Supply (−VS = 0) +12 +36 +12 +36 V Quiescent Current ±11
±15
±11
±15
mA Digital Common −VS +VS − 4 –VS +VS − 4 V Analog Common −VS +VS −VS +VS V TEMPERATURE RANGE Specified Performance JP, KP Grade 0 +70 0 +70 °C AQ, BQ Grade −40 +85 −40 +85 °C SQ Grade −55 +125 °C 1 Referred to internal VREF. In PLCC package, tested on 10 V input range only. Rev. C | Page 4 of 28 Document Outline FEATURES PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION DEFINITIONS OF SPECIFICATIONS THEORY OF OPERATION OVERRANGE SVFC CONNECTION FOR DUAL SUPPLY, POSITIVE INPUT VOLTAGES SVFC CONNECTIONS FOR NEGATIVE INPUT VOLTAGES SVFC CONNECTION FOR BIPOLAR INPUT VOLTAGES PLCC CONNECTIONS GAIN AND OFFSET CALIBRATION GAIN PERFORMANCE REFERENCE NOISE DIGITAL INTERFACING CONSIDERATIONS COMPONENT SELECTION DIGITAL GROUND SINGLE-SUPPLY OPERATION FREQUENCY-TO-VOLTAGE CONVERTER DECOUPLING AND GROUNDING FREQUENCY OUTPUT MULTIPLIER SINGLE-LINE MULTIPLEXED DATA TRANSMISSION Multiplexer Transmitter SVFC Demultiplexer Analog Signal Reconstruction ISOLATED FRONT END A-TO-D CONVERSION DELTA MODULATOR BRIDGE TRANSDUCER INTERFACE OUTLINE DIMENSIONS ORDERING GUIDE