Datasheet ADXRS652 (Analog Devices) - 6

ADXRS652 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PGND V CP5 CP3 DD CP4 7 6 ST1 CP1 5 ST2 CP2 4 TEMP AVCC 3 2 1 AGND RATEOUT V
23
RATIO NC SUMJ
0 0-
G F E D C B A
82 08 Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
6D, 7D CP5 HV Filter Capacitor, 0.1 μF. 6A, 7B CP4 Charge Pump Capacitor, 22 nF. 6C, 7C CP3 Charge Pump Capacitor, 22 nF. 5A, 5B CP1 Charge Pump Capacitor, 22 nF. 4A, 4B CP2 Charge Pump Capacitor, 22 nF. 3A, 3B AVCC Positive Analog Supply. 1B, 2A RATEOUT Rate Signal Output. 1C, 2C SUMJ Output Amp Summing Junction. 1D, 2D NC No Connection. 1E, 2E VRATIO Reference Supply for Ratiometric Output. 1F, 2G AGND Analog Supply Return. 3F, 3G TEMP Temperature Voltage Output. 4F, 4G ST2 Self-Test for Sensor 2. 5F, 5G ST1 Self-Test for Sensor 1. 6G, 7F PGND Charge Pump Supply Return. 6E, 7E VDD Positive Charge Pump Supply. Rev. A | Page 5 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS RATE SENSITIVE AXIS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SETTING BANDWIDTH TEMPERATURE OUTPUT AND CALIBRATION MODIFYING THE ADXRS652 SCALE TO MATCH THE ADXRS620 CALIBRATED PERFORMANCE ADXRS652 AND SUPPLY RATIOMETRICITY NULL ADJUSTMENT SELF-TEST FUNCTION CONTINUOUS SELF-TEST OUTLINE DIMENSIONS ORDERING GUIDE