link to page 14 link to page 14 link to page 8 ADIS16080PIN CONFIGURATION AND FUNCTION DESCRIPTIONSEEVTTI1LRAIDNIRFVA5678NC49AIN2ADIS16080DOUT310COMBOTTOMVIEW(Not to Scale)SCLK211VREFDIN112ST216151413 04 0 SCC1 5- NC = NO CONNECTCNCT 04 VS 06 Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No.MnemonicType1 Description 1 DIN I SPI Data Input. 2 SCLK I SPI Serial Clock. 3 DOUT O SPI Data Output. 4 NC No Connect. 5 RATE O Buffered Analog Output. Represents the angular rate signal. 6 FILT I External Capacitor Connection to Control Bandwidth. 7 VDRIVE S SPI Power Supply. This can be the receive processing circuit’s supply to simplify interfacing. 8 AIN1 I External Analog Input Channel 1. See ADD0 and ADD1 address bits in Table 5. 9 AIN2 I External Analog Input Channel 2. See ADD0 and ADD1 address bits in Table 5. 10 COM S Common. Reference point for all circuitry in the ADIS16080. 11 VREF O Precision 2.5 V Reference. 12 ST2 I Self-Test Input 2. 13 ST1 I Self-Test Input 1. 14 VCC S Analog Power. 15 NC No Connect. 16 CS I Chip Select. Active low. This input frames the serial data transfer and initiates the conversion process. 1 I = input; O = output; S = power supply. 3.6865 BSC8×2.5050 BSC8×0.6700 BSC 12×7.373 BSC5.010 BSC2×4× 20 0 1.000 BSC.5000 BSC 5- 16×16× 04 06 Figure 5. Second-Level Assembly Pad Layout Rev. C | Page 7 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SUPPLY AND COMMON CONSIDERATIONS INCREASING MEASUREMENT RANGE SETTING BANDWIDTH SELF-TEST FUNCTION CONTINUOUS SELF-TEST RATE SENSITIVE AXIS BASIC OPERATION SERIAL PERIPHERAL INTERFACE (SPI) Control Register ADC Conversion Output Data Access Output Coding Examples APPLICATIONS INFORMATION ASSEMBLY INTERFACE BOARD OUTLINE DIMENSIONS ORDERING GUIDE
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