LT1158 TEST CIRCUIT 150Ω 2W 1 16 BOOST DR BOOST + VN2222LL + 2 15 1μF V16 V+ T GATE DR + 0.01μF + V+ 3 14 10μF BIAS T GATE FB 2k 3000pF 1/2W 4 13 + ENABLE T SOURCE V14 – V13 + 5 LT1158 12 V4 FAULT SENSE+ CLOSED 3k LOOP 1/2W 6 11 100Ω + INPUT SENSE– V12 V6 50Ω 7 10 + GND V+ V11 8 9 B GATE FB B GATE DR 3000pF + V8 LT1158 TC01 OPERATION (Refer to Functional Diagram) The LT1158 self-enables via an internal 25μA pull-up on Whenever there is an input transition on pin 6, the LT1158 the enable pin 4. When pin 4 is pulled down, much of the follows a logical sequence to turn off one MOSFET and turn input logic is disabled, reducing supply current to 2mA. on the other. First, turn-off is initiated, then VGS is moni- With pin 4 low, the input state is ignored and both MOSFET tored until it has decreased below the turn-off threshold, gates are actively held low. With pin 4 enabled, one or the and fi nally the other gate is turned on. An input latch gets other of the 2 MOSFETs is turned on, depending on the reset by every low state at pin 6, but can only be set if the state of the input pin 6: high for top side on, and low for top source pin has gone low, indicating that there will be bottom side on. The 1.4V input threshold is regulated and suffi cient charge in the bootstrap capacitor to safely turn has 200mV of hysteresis. on the top MOSFET. In order to allow operation over 5V to 30V nominal supply In order to conserve power, the gate drivers only provide voltages, an internal bias generator is employed to furnish turn-on current for up to 2μs, set by internal one-shot constant bias voltages and currents. The bias generator is circuits. Each LT1158 driver can deliver 500mA for 2μs, decoupled at pin 3 to eliminate any effects from switching or 1000nC of gate charge––more than enough to turn on transients. No DC loading is allowed on pin 3. multiple MOSFETs in parallel. Once turned on, each gate is held high by a DC gate sustaining current: the bottom The top and bottom gate drivers in the LT1158 each utilize gate by a 100μA current source, and the top gate by an two gate connections: 1) A gate drive pin, which provides on-chip charge pump running at approximately 500kHz. the turn-on and turn-off currents through an optional series gate resistor; and 2) A gate feedback pin which connects The fl oating supply for the top side driver is provided by directly to the gate to monitor the gate-to-source voltage a bootstrap capacitor between the boost pin 16 and top and supply the DC gate sustaining current. source pin 13. This capacitor is recharged each time pin 13 1158fb 8
