Datasheet LT1160, LT1162 (Analog Devices) - 8

LT1160/LT1162
W U W TI I G DIAGRA
2V IN TOP 0.8V 2V IN BOTTOM 0.8V tr tD3 tD2 12V 10V TOP GATE DRIVER 2V 0V t t D1 f tD4 tr tD3 tD2 12V 10V BOTTOM GATE 2V DRIVER 0V 1160/62 TD tD1 tf tD4
U OPERATIO (Refer to Functional Diagram)
The LT1160 (or 1/2 LT1162) incorporates two indepen- UV detect block disables the high side channel when dent driver channels with separate inputs and outputs. The VBOOST – VTSOURCE is below its own undervoltage trip inputs are TTL/CMOS compatible; they can withstand point. input voltages as high as V+. The 1.4V input threshold is The top and bottom gate drivers in the LT1160 each utilize regulated and has 300mV of hysteresis. Both channels are two gate connections: 1) a gate drive pin, which provides noninverting drivers. The internal logic prevents both the turn on and turn off currents through an optional series outputs from simultaneously turning on under any input gate resistor, and 2) a gate feedback pin which connects conditions. When both inputs are high both outputs are directly to the gate to monitor the gate-to-source voltage. actively held low. Whenever there is an input transition to command the The floating supply for the top driver is provided by a outputs to change states, the LT1160 follows a logical bootstrap capacitor between the Boost pin and the Top sequence to turn off one MOSFET and turn on the other. Source pin. This capacitor is recharged each time the First, turn-off is initiated, then V negative plate goes low in PWM operation. GS is monitored until it has decreased below the turn-off threshold, and finally the The undervoltage detection circuit disables both channels other gate is turned on. when V+ is below the undervoltage trip point. A separate 11602fb 8