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Datasheet AD712 (Analog Devices) - 7

ПроизводительAnalog Devices
ОписаниеPrecision, Low Cost, High Speed, BiFET Dual Op Amp
Страниц / Страница11 / 7 — DLA LAND AND MARITIME. COLUMBUS, OHIO. 16236. V62/11603
ВерсияA
Формат / Размер файлаPDF / 76 Кб
Язык документаанглийский

DLA LAND AND MARITIME. COLUMBUS, OHIO. 16236. V62/11603

DLA LAND AND MARITIME COLUMBUS, OHIO 16236 V62/11603

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Логический элемент И, семейство AC, 3 элемента, 3 входа, 24мА, 2В до 6В, SOIC-14
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AD712
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TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions Temperature, Device Limits Unit V type S = 15 V TA unless otherwise specified Min Max Input current noise NI f = 1 kHz +25C 01 0.01 typical pA / Hz Open loop gain AOL +25C 01 150 V/mV -55C to +125C 100 Output characteristics Output voltage swing VOH +25C 01 13.0 V high -55C to +125C 12.0 Output voltage swing VOL +25C 01 -12.5 V low -55C to +125C -12.0 Output current IOUT +25C 01 25 typical mA Power supply section Rated performance +25C 01 15 typical V Operating range +25C 01 4.5 18 V Quiescent current +25C 01 6.8 mA 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = +25C. 3/ Bias current specifications are guaranteed maximum at either input after five minutes of operation at TA = +25C. For higher temperatures, the current doubles every 10C. 4/ The || symbolizes that the input impedance is being represented as the resistance value is in parallel with the capacitance. 5/ Defined as voltage between inputs, such that neither exceeds 10 V from ground. 6/ Typically exceeding -14.1 V negative common mode voltage on either input results in an output phase reversal.
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CODE IDENT NO. DWG NO.
COLUMBUS, OHIO A 16236 V62/11603
REV A PAGE 7
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