KSZ8775CLX Integrated 5–Port 10/100 Managed Ethernet Switch with Port 4 RMII and Port 5 RGMII/MII/ RMII Interfaces Features • Management Capabilities -The KSZ8775CLX includes all the functions of a 10/100BASE-T/TX switch system, which combines a switch engine, frame buffer management, address look-up table, queue management, MIB counters, media access controllers (MAC), and PHY transceivers -Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing a 1024-entry forwarding table -Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port -MIB counters for fully compliant statistics gathering -36 counters per port -Hardware support for port-based flush and freeze command in MIB counter. -Multiple loopback of remote, PHY, and MAC modes support for the diagnostics -Rapid spanning tree support (RSTP) for topology management and ring/linear recovery • Robust PHY Ports -Four integrated IEEE 802.3/802.3u-compliant Ethernet transceivers supporting 10Base-T and 100BASE-TX -802.1az EEE supported -On-chip termination resistors and internal biasing for differential pairs to reduce power -HP Auto MDI/MDI-X™ crossover support eliminates the need to differentiate between straight or crossover cables in applications • MAC and GMAC Ports -Four internal media access control (MAC1 to MAC4) units and one internal Gigabit media access control (GMAC5) unit -RGMII, MII, or RMII interfaces support for the Port 5 GMAC5 with uplink and RMII interface for Port 4 MAC4 -2 kb jumbo packet support -Tail tagging mode (one byte added before FCS) support on Port 5 to inform the processor which ingress port receives the packet and its priority DS00002129C-page 1 -Supports reduced media independent interface (RMII) with 50 MHz reference clock output -Supports media independent interface (MII) in either PHY mode or MAC mode on Port 5 -LinkMD® cable diagnostic capabilities for determining cable opens, shorts, and length • Advanced Switch Capabilities -Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing a 1024-entry forwarding table -64kb frame buffer RAM -IEEE 802.1q VLAN support for up to 128 active VLAN groups (full-range 4096 of VLAN IDs) -IEEE 802.1p/q tag insertion or removal on a per port basis (egress) -VLAN ID tag/untag options on per port basis -Fully compliant with IEEE 802.3/802.3u standards -IEEE 802.3x full-duplex with force mode option and half-duplex back-pressure collision flow control -IEEE 802.1w rapid spanning tree protocol support -IGMP v1/v2/v3 snooping for multicast packet filtering -QoS/CoS packets prioritization support: 802.1p, DiffServ-based and re-mapping of 802.1p priority field per port basis on four priority levels -IPv4/IPv6 QoS support -IPv6 multicast listener discovery (MLD) snooping -Programmable rate limiting at the ingress and egress ports on a per port basis -Jitter-free per-packet-based rate limiting support -Tail tagging mode (one byte added before FCS) support on Port 5 to inform the processor which ingress port receives the packet and its priority -Broadcast storm protection with percentage control (global and per port basis) 2015 Microchip Technology Inc.
