Datasheet KS8995E (Microchip) - 5
| Производитель | Microchip |
| Описание | 5-Port 10/100 Integrated Switch with PHY and Frame Buffer |
| Страниц / Страница | 41 / 5 — KS8995E Micrel EEPROM Memory Map . 25. Priority Classification Control – … |
| Формат / Размер файла | PDF / 201 Кб |
| Язык документа | английский |
KS8995E Micrel EEPROM Memory Map . 25. Priority Classification Control – 802.1p Tag Field . 25. Control Register 1 . 25
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Текстовая версия документа
KS8995E Micrel EEPROM Memory Map . 25
Priority Classification Control – 802.1p Tag Field . 25
Control Register 1 . 25
Control Register 2 . 25
Control Register 3 . 26
Control Register 4 . 26
Control Register 5 . 26
Port 1 VLAN Mask Register . 27
Port 2 VLAN Mask Register . 27
Port 3 VLAN Mask Register . 27
Port 4 VLAN Mask Register . 28
Port 5 VLAN Mask Register . 28
Port 1 VLAN Tag Insertion Value Register . 28
Port 2 VLAN Tag Insertion Value Register . 28
Port 3 VLAN Tag Insertion Value Register . 29
Port 4 VLAN Tag Insertion Value Register . 29
Port 5 VLAN Tag Insertion Value Register . 29
Diff Serv Code Point Register . 29
Station MAC Address Registers (all ports – MAC control frames only) . 29
Absolute Maximum Ratings . 30
Operating Ratings . 30
Electrical Characteristics . 30
Timing Diagrams . 32
Reference Circuit . 36
4B/5B Coding . 37 MLT Coding . 38 802.1q VLAN and 802.1p Priority Frame . 39
Selection of Isolation Transformers . 40
Selection of Reference Crystals . 40
Package Outline and Dimensions . 41 August 2003 5 KS8995E
