Datasheet ADF5001 (Analog Devices) - 9

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ADF5001 OUTLINE DIMENSIONS 3.10 0.30 3.00 SQ 0.25 2.90 PIN 1 0.18 PIN 1 INDICATOR 13 16 INDICATOR 0.50 12 1 BSC EXPOSED 1.60 PAD 1.50 SQ 1.40 9 4 8 5 0.45 0.25 MIN TOP VIEW BOTTOM VIEW 0.40 0.35 0.80 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO 0.75 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COPLANARITY SEATING 0.08 PLANE 0.20 REF -A 08 18 COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 11
Figure 11. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-18) Dimensions shown in millimeters
ORDERING GUIDE Temperature Package Model1 Range Package Description Option Branding
ADF5001BCPZ −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ) CP-16-18 Q1S ADF5001BCPZ-RL7 −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ), 7” Tape CP-16-18 Q1S and Reel EVAL-ADF5001EB2Z Evaluation Board 1 Z = RoHS Compliant Part. Rev. A | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EVALUATION BOARD PCB PCB MATERIAL STACK-UP BILL OF MATERIALS APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES