Datasheet LT3958 (Analog Devices) - 9

LT3958
block DiagraM
L1 CDC D1 VIN • VOUT R4 R3 CIN L2 COUT • EN/UVLO VIN SW 25 27 8, 9, 20, A10 21, 38 I – S1 2µA + 1.22V 2.5V INTERNAL REGULATOR AND UVLO I CURRENT S2 12.8V LIMIT 10µA UVLO + A9 Q3 7.2V LDO INTV – CC INTVCC 2.5V G4 G3 28 A8 + CVCC IS3 1.72V A11 – 3.75V – TLO 165˚C + DRIVER G6 SR1 A12 VC – – +A7 G5 R O G2 M1 –0.88V + S SENSE1 6 Q2 PWM COMPARATOR RSENSE GND – 48mV 1.6V +A1 A6 – SLOPE V 12, 13, 14, + ISENSE 15, 16, 17 SENSE SENSE2 + RAMP + 3 A2 RAMP A5 –0.8V – GENERATOR – 1.28V – +A3 100kHz-1MHz G1 OSCILLATOR FREQUENCY 1.2V + FREQUENCY FOLDBACK + FOLDBACK A4 Q1 – FREQ PROG FBX VC SS SYNC RT SGND 31 30 32 34 33 4, 23, 3958 F01 R2 24, 37 VOUT CC2 R C C SS RT R1 CC1
Figure 1. LT3958 Block Diagram Working as a SEPIC Converter
3958fa For more information www.linear.com/LT3958 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Applications Related Parts