Datasheet LT3581 (Analog Devices) - 8

LT3581
BLOCK DIAGRAM
OPTIONAL D1 L1 M1 VIN VOUT CIN COUT1 COUT2 RFAULT RGATE GATE FAULT 22V SOFT- 933µA DIE TEMP MIN START VC 165°C VIN 750mV + – – + – + 2.1V + SW1 ** – 42V MIN 50mV + SAMPLE MODE BLOCK + SW2 STARTUP – ** 1.8V – AND FAULT – 42V + 1.17V LOGIC MIN 250k + – + ISW1 FB LDO SS DRIVER – 1.9A + DISABLE MIN SW2 – 45mV CSS TD ~ 30ns SAMPLE + VBE • 0.9 RFB SHDN – + SW1 Q2 1.33V – COMPARATOR SR1 DRIVER 27mΩ UVLO – V Q1 IN R Q A3 A3 1.215V S REFERENCE + + + RS 14.6k 20mΩ A1 A4 ∑ – – FB RAMP GENERATOR GND + FREQUENCY ÷N ADJUSTABLE 14.6k A2 FOLDBACK OSCILLATOR SS – SYNC BLOCK VC SYNC RT CLKOUT RC R C T C 3581 BD **SW OVERVOLTAGE PROTECTION IS NOT GUARANTEED TO PROTECT THE LT3581 DURING SW OVERVOLTAGE EVENTS
Figure 1. Block Diagram
3581fb 8 For more information www.linear.com/LT3581 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram State Diagram Operation Applications Information Appendix Typical Applications Typical Application Related Parts