Datasheet LT1680 (Analog Devices) - 9

LT1680
U OPERATIO Slope Compensation
tions. However, if additional slope compensation is de- For duty cycles greater than 50%, slope compensation is sired, it is available through the SL/ADJ pin. Excessive required to prevent current mode duty cycle instability in slope compensation will cause reduction in maximum the regulator control loop. The LT1680 employs internal load current capability and is generally not desirable. slope compensation that is adequate for most applica-
U U W U APPLICATIO S I FOR ATIO RSENSE Selection for Input Current Limit
If high value feedback resistors are used, the input bias current of the V R FB pin (1µA maximum) could cause a slight SENSE generates a voltage that is proportional to the increase in output voltage. A Thevenin resistance at the inductor current for use by the LT1680 current sense V amplifier. The value of R FB pin of < 5k is recommended. SENSE is based on the required input current. The average current limit function has a
Oscillator Components RCT and CCT
typical threshold of 120mV/RSENSE, or: The LT1680 oscillator creates a modified sawtooth at its RSENSE = 120mV/ILIMIT timing node (CT) with a slow charge, rapid discharge Operation with VSENSE common mode voltage below 4.5V characteristic. The discharge time (tDISCH) corresponds to may slightly degrade current limit accuracy. See Average the minimum off time of the PWM controller. This limits Current Limit Threshold Tolerance vs Common Mode maximum duty cycle (DCMAX) to: Voltage in the Typical Performance Characteristics sec- DCMAX = 1 – (tDISCH)(fO) tion for more information. This relation corresponds to the minimum value of the
Output Voltage Programming
timing resistor (RCT), which can be determined according to the following relation (R Output voltage is programmed through a resistor feed- CT vs DCMAX graph appears in the Typical Performance Characteristics section): back network to the VFB pin (Pin 7) on the LT1680. This pin is the inverting input of the error amplifier, which is RCT(MIN) ≈ [(0.8)(10–3)(1 – DCMAX)] –1 internally referenced to 1.25V. The divider is ratioed to Values for RCT > 15k yield maximum duty cycles above provide 1.25V at the VFB pin when the output is at its 90%. Given a timing resistor value, the value of the timing desired value. Output voltage is thus set following the capacitor (C relation: CT) can then be determined for desired oper- ating frequency (fO) using the relation: VOUT = 1.25V(1 + R2/R1) (1/ )–(100)(10–9) when an external resistor divider is connected to the fO C ≈ output as shown in Figure 1. CT 1.75 R ( /1.8 ) CT 5 + VOUT (2. )5 10–3 – 3.375 /R ( ) ( ) CT R2 LT1680 7 A plot of Operating Frequency vs RCT and CCT is shown in VFB Figure 2. Typical 100kHz operational values are CCT = SGND R1 1000pF and RCT = 16.9k. 6 1680 F01
Figure 1. Programming LT1680 Output Voltage
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