Datasheet ATmega163, ATmega163L - Summary (Atmel) - 7

ATmega163(L) Register Summary (Continued) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
$00 ($20) TWBR Two-wire Serial Interface Bit Rate Register 82 Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on all bits in the I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
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1142ES–AVR–02/03 Document Outline Features Pin Configurations Description Block Diagram Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) RESET XTAL1 XTAL2 AVCC AREF AGND Register Summary Instruction Set Summary Ordering Information Packaging Information 44A 40P6 Erratas ATmega163(L) Errata Rev. F ChangeLog Changes from Rev. 1142C-09/01 to Rev. 1142D-09/02 Changes from Rev. 1142D-09/09 to Rev. 1142E-02/03