Datasheet AD586 (Analog Devices) - 6

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AD586 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NOISE NOISE NOISE TP1 1 8 REDUCTION TP1 1 8 REDUCTION TP1 1 8 REDUCTION AD586 V AD586 IN 2 TP1 7 V AD586 IN 2 TP1 7 VIN 2 TP1 7 TOP VIEW TOP VIEW TP1 3 6 VOUT (Not to Scale) TP1 3 (Not to Scale) 6 VOUT TP1 3 TOP VIEW 6 VOUT GND 4 5 TRIM GND (Not to Scale) 4 5 TRIM GND 4 5 TRIM 1TP DENOTES FACTORY TEST POINT. 1 1 NO CONNECTIONS, EXCEPT DUMMY PCB PAD, TP DENOTES FACTORY TEST POINT. TP DENOTES FACTORY TEST POINT. SHOULD BE MADE TO THESE POINTS. NO CONNECTIONS, EXCEPT DUMMY PCB PAD, NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
00529-002
SHOULD BE MADE TO THESE POINTS.
00529-003
SHOULD BE MADE TO THESE POINTS.
00529-004 Figure 2. Pin Configuration (N-8) Figure 3. Pin Configuration (Q-8) Figure 4. Pin Configuration (R-8)
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 TP1 Factory Trim Pad (No Connect). 2 VIN Input Voltage. 3 TP1 Factory Trim Pad (No Connect). 4 GND Ground. 5 TRIM Optional External Fine Trim. See the Applying the AD586 section. 6 VOUT Output Voltage. 7 TP1 Factory Trim Pad (No Connect). 8 NOICE REDUCTION Optional Noise Reduction Filter with External 1µF Capacitor to Ground. Rev. G | Page 6 of 16 Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD586J, AD586K/AD586A, AD586L/AD586B AD586M, AD586S, AD586T ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS THEORY OF OPERATION APPLYING THE AD586 NOISE PERFORMANCE AND REDUCTION TURN-ON TIME DYNAMIC PERFORMANCE LOAD REGULATION TEMPERATURE PERFORMANCE NEGATIVE REFERENCE VOLTAGE FROM AN AD586 USING THE AD586 WITH CONVERTERS 5 V REFERENCE WITH MULTIPLYINGCMOS DACs OR ADCs STACKED PRECISION REFERENCES FORMULTIPLE VOLTAGES PRECISION CURRENT SOURCE PRECISION HIGH CURRENT SUPPLY OUTLINE DIMENSIONS ORDERING GUIDE