Datasheet LTM4676A (Analog Devices) - 22

LTM4676A
operaTion POWER MODULE INTRODUCTION
The LTM4676A is a pin-compatible replacement to the The LTM4676A is a highly configurable dual 13A out- LTM4676, with enhanced feature set. put standalone nonisolated switching mode step-down n Tighter output voltage regulation accuracy (total DC DC/DC power supply with built-in EEPROM NVM (non- error): ±0.5% rather than ±1%, for VOUTn ≥ 1V; ±5mV volatile memory) with ECC and I2C-based PMBus/SMBus rather than ±1%, for 0.6V ≤ VOUTn < 1V. 2-wire serial communication interface capable of 400kHz n The module’s turn-on start-up time (see t SCL bus speed. Two output voltages can be regulated START in the Electrical Characteristics table) has been reduced to (VOUT0, VOUT1—collectively, VOUTn) with a few external 35ms (40ms, maximum, over temperature). input and output capacitors and pull-up resistors. Read- back telemetry data of average input and output voltages n VOUT0 and VOUT1 are both configurable for up to and currents, Channel PWM duty cycles, and module 5.5VOUT. temperatures are continually digitized cyclically by an n An LTM4676A synchronizing to an external SYNC clock integrated 16-bit ADC (analog-to-digital converter). Many can be configured for better fault tolerance, i.e., the fault thresholds and responses are customizable. Data can behavior of a “sync slave”-configured LTM4676A can be autonomously saved to EEPROM when a fault occurs, be set to automatically operate at its nominal target and the resulting fault log can be retrieved over I2C at a switching frequency in the absence of a SYNC clock, later time, for analysis. rather than operate at the lower-end of its PLL sync- The LTM4676A provides precisely regulated output volt- capture range. ages between 0.6VDC to 5.5VDC (±0.5% above 1VDC, n MFR_ADC_CONTROL and MFR_ADC_TELEMETRY_ ±5mV below 1VDC). The target output voltage can be STATUS are new commands, enabling faster telemetry set according to pin-strapping resistors (VOUTnCFG and update rates—up to 125Hz in LTM4676A, compared VTRIMnCFG pins), NVM/register settings, and altered on to 10Hz in LTM4676, nominal. the fly via the I2C interface. The output voltage can be modified by the user at any time with a write to PMBus n PMBus compliance to Version 1.2 of Part I and Part II of VOUT_COMMAND. Executing this command has a typical PMBus Specifications documents. The LTM4676A sup- latency less than 10ms. Writes to PMBus OPERATION have ports the PAGE_PLUS_READ, PAGE_PLUS_WRITE a typical latency less than 1ms. The NVM factory-default and SMBALERT_MASK commands. switching frequency is 500kHz and the phase-interleaving n Improved fault logging. See Appendix C, PMBus Com- angle between its two channels is 180°. Channel switch- mand Details. EEPROM enhanced with ECC. ing frequency, phase angle, and phase relationship with respect to the fal ing edge of the SYNC pin waveform can n For parallel-output applications, the differential ampli- + – be configured according to a pin-strap resistor (F fier sensing VOSNS0 /VOSNS0 can be used to regulate SWPHCFG pin) and NVM/register settings—though, not on the fly the paralleled VOUT0 and VOUT1 outputs. VOSNS1 can + during regulation. The 7-bit I2C slave address of the module be connected to VOSNS0 and SGND can be connected defaults to the value retrieved from MFR_ADDRESS[6:0] at to power GND local to the module rather than at the power-up (factory default: 0x4F), but the least significant point of load sensing-point, for routing convenience four bits of the address are set by resistor pin-strapping (MFR_PWM_CONFIG[7]). the ASEL pin. Bits[6:4] of MFR_ADDRESS can be writ- n Any 7-bit slave address can be assigned to the ten and stored to EEPROM. Between the ASEL resistor LTM4676A. Bits [6:4] of MFR_ADDRESS are user- pin-strap and user-configurable MFS_ADDRESS[6:4], the configurable and can be stored to EEPROM. The least LTM4676A can take on any 7-bit slave address desired. significant nibble of MFR_ADDRESS is assigned by With the exception of the ASEL pin, the module can be the resistor pin-strap setting on the ASEL pin. configured to ignore all pin-strap resistors, if desired (see MFR_CONFIG_ALL[6]). 4676afa 22 For more information www.linear.com/LTM4676A Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4676A In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photograph Package Description Revision History Typical Application Design Resources Related Parts