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Datasheet LTC4015 (Analog Devices) - 68

ПроизводительAnalog Devices
ОписаниеMultichemistry Buck Battery Charger Controller with Digital Telemetry System
Страниц / Страница76 / 68 — DETAILED REGISTER DESCRIPTIONS. max_charge_time_fault_alert (Sub-Address …
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DETAILED REGISTER DESCRIPTIONS. max_charge_time_fault_alert (Sub-Address 0x37, Bit 2, R/Clear)

DETAILED REGISTER DESCRIPTIONS max_charge_time_fault_alert (Sub-Address 0x37, Bit 2, R/Clear)

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LTC4015
DETAILED REGISTER DESCRIPTIONS max_charge_time_fault_alert (Sub-Address 0x37, Bit 2, R/Clear)
If en_max_charge_time_fault_alert=1, this bit indicates that an SMBALERT has occurred due to the occurrence of a max_charge_time_fault.
bat_missing_fault_alert (Sub-Address 0x37, Bit 1, R/Clear)
If en_bat_missing_fault_alert=1, this bit indicates that an SMBALERT has occurred due to the occurrence of bat_missing_fault.
bat_short_fault_alert (Sub-Address 0x37, Bit 0, R/Clear)
If en_bat_short_fault_alert=1, this bit indicates that an SMBALERT has occurred due to the occurrence of bat_ short_fault.
CHARGE_STATUS_ALERTS (Sub-Address 0x38, Bits 3:0, R/Clear)
This register consists of individual battery charger charge status alert bits. Individual alert bits will be asserted if the individual alert has been enabled and the transition into that state occurs. Once asserted, alert bits remain high until disabled or cleared. Writing a 0 to any bit clears that alert. If an enabled alert is cleared and the alerting condition remains, a new alert is triggered immediately. When a new alert occurs, the LTC4015 pulls down the SMBALERT pin and holds it low until an alert response algorithm (ARA) is completed. See the section Programmable Alerts and Interrupt Controller for more information regarding the SMBALERT and ARA functions.
vin_uvcl_active_alert (Sub-Address 0x38, Bit 3, R/Clear)
If en_vin_uvcl_active_alert=1, this bit indicates that an SMBALERT has occurred because the UVCL undervolt- age current limit regulation loop of the LTC4015 has taken control of the switching regulator charger delivery (vin_uvcl_active=1).
iin_limit_active_alert (Sub-Address 0x38, Bit 2, R/Clear)
If en_iin_limit_active_alert=1, this bit indicates that an SMBALERT has occurred because the input current regulation loop of the LTC4015 has taken control of the switching regulator charger delivery (iin_limit_active=1).
constant_current_alert (Sub-Address 0x38, Bit 1, R/Clear)
If en_constant_current_alert=1, this bit indicates that an SMBALERT has occurred because the battery charge current regulation loop of the LTC4015 has taken control of the switching charger current delivery (constant_current=1).
constant_voltage_alert (Sub-Address 0x38, Bit 0, R/Clear)
If en_constant_voltage_alert=1, this bit indicates that an SMBALERT has occurred because the battery voltage regulation loop of the LTC4015 has taken control of the switching charger current delivery (constant_voltage=1).
SYSTEM_STATUS (Sub-Address 0x39, Bits 13:0, R)
This register consists of individual real-time status bits which indicate various system conditions.
charger_enabled (Sub-Address 0x39, Bit 13, R)
This bit indicates that the LTC4015 is actively charging a battery.
mppt_en_pin (Sub-Address 0x39, Bit 11, R)
This bit indicates that the external MPPT pin is detected as being high and maximum power point tracking is enabled.
equalize_req (Sub-Address 0x39, Bit 10, R)
This bit indicates that a rising edge has been detected at the EQ pin and a lead-acid equalization charge is running or is queued to run. See Lead-Acid Equalization Charge. 4015fb 68 For more information www.linear.com/LTC4015 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Data Sheet Conventions Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram I2C Timing Diagram Operation Applications Information Register Description DETAILED Register Descriptions Typical Applications Package Description Revision History Typical Application Related Parts
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