Datasheet LT3651-4.1, LT3651-4.2 (Analog Devices) - 9

LT3651-4.1/LT3651-4.2
BLOCK DIAGRAM
STANDBY – BOOST 50µA UVLO 5 + 4.6V + VIN I 32, 33, 34 LIM 28 – 35V OVLO CLN + + 30 + CLP R – + 29 – LATCH S Q A13 A12 RT 36 OSC TIMER 0.25V 24 + – + SW TIMER OSC – 7, 11-18, 22, 38 A11 A14 V A10 IN + 125°C – T VC J REV CUR RIPPLE COUNTER INHIBIT C-EA R COUNT – S SENSE STANDBY 4 RESET + RS BAT COUNT 3 A9 – + V-EA – COUNT + RESET MODE 0.3V + ENABLE (TIMER ITH CHRG OR C/10) RNG/SS 26 CONTROL LOGIC 10RS 35 FAULT TERMINATE 25 SS/RESET SS/RESET STATUS 50µA A8 – C/10 + 0.1V + + 1V 0.15V A7 – PRECONDITION + 2.9V NTC VINT 2.7V A6 – SHDN 27 ×2.25 + + + + A1 + STANDBY 1.2V 4.2V 4.1V 1.36V 50µA – A4 + A2 TERMINATE – – ACPR NTC 0.29V + A3 2 1 A5 + – + 1.3V 2.4V – 0.7V 46µA GND 6, 23, 31, 37 365142 BD VBAT(FLT): 4.1V FOR LT3651-4.1, 4.2V FOR LT3651-4.2 VBAT(FLT)-VRECHRG: 4.0V FOR LT3651-4.1, 4.1V FOR LT3651-4.2 VBAT(PRE): 2.85V FOR LT3651-4.1, 2.9V FOR LT3651-4.2 365142ff For more information www.linear.com/LT3651-4.1 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Pin Functions Block Diagram Operation Applications Information Typical Applications Revision History Typical Application Related Parts