Datasheet LT3650-4.1, LT3650-4.2 (Analog Devices) - 8

LT3650-4.1/LT3650-4.2
block DiagraM
125°C + – CLP STANDBY T + DIE – UVLO 4.6V + – 50mV BOOST OVLO + – 35V VIN + 10mΩ R TIMER 0.2V LATCH – – + S Q 30mV OSC 1MHz +
TIMER
–
OSC.
SW VC RS SENSE – C-EA STANDBY RS BAT
RIPPLE
+
COUNTER
OFFSET COUNT – + RESET COUNT – 0.3V V-EA + RESET COUNT ITH ENABLE MODE 10 × RS RNG/SS (TIMER OR C/10) CHRG
CONTROL LOGIC
TERMINATE FAULT SS RESET SSRESET 50µA STATUS – C/10 + 0.1V – PRECONDITION 1V 0.15V + 2.9V NTC – SHDN VINT x2.25 + 2.7V + – STANDBY 1.2V 1.36V 1.2V 4.2V* 4.1V** – – + 50µA + TERMINATE 0.29V NTC – + 1.3V * VBAT(FLT): 4.2V FOR LT3650-4.2, 4.1V FOR LT3650-4.1 ** VBAT(FLT) – ∆VRECHRG: 4.1V FOR LT3650-4.2, 4.0 FOR LT3650-4.1 0.7V 46µA 365042 BD 36504142fc 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts