LTC1050 OUUWUAPPLICATIS I FOR ATIO Figure 2 is an example of the introduction of an unneces- PACKAGE-INDUCED OFFSET VOLTAGE sary resistor to promote differential thermal balance. Package-induced thermal EMF effects are another impor- Maintaining compensating junctions in close physical prox- tant source of errors. It arises at the copper/kovar junctions imity will keep them at the same temperature and reduce formed when wire or printed circuit traces contact a thermal EMF errors. package lead. Like all the previously mentioned thermal EMF effects, it is outside the LTC1050’s offset nulling loop NOMINALLY and cannot be cancelled. The input offset voltage specifi- UNNECESSARY LEAD WIRE/SOLDER/COPPER RESISTOR USED TO TRACE JUNCTION cation of the LTC1050 is actually set by the package-induced THERMALLY BALANCE OTHER INPUT RESISTOR warm-up drift rather than by the circuit itself. The thermal + time constant ranges from 0.5 to 3 minutes, depending LTC1050 OUTPUT upon package type. – RESISTOR LEAD, SOLDER COPPER TRACE JUNCTION OPTIONAL EXTERNAL CLOCK An external clock is not required for the LTC1050 to 1050 F02 operate. The internal clock circuit of the LTC1050 sets the nominal sampling frequency at around 2.5kHz. This fre- quency is chosen such that it is high enough to remove the amplifier 1/f noise, yet still low enough to allow internal circuits to settle.The oscillator of the internal clock circuit Figure 2 has a frequency 4 times the sampling frequency and its output is brought out to Pin 5 through a 2k resistor. When When connectors, switches, relays and/or sockets are the LTC1050 operates without using an external clock, necessary they should be selected for low thermal EMF Pin 5 should be left floating and capacitive loading on this activity. The same techniques of thermally balancing and pin should be avoided. If the oscillator signal on Pin 5 is coupling the matching junctions are effective in reducing used to drive other external circuits, a buffer with low the thermal EMF errors of these components. input capacitance is required to minimize loading on this Resistors are another source of thermal EMF errors. pin. Figure 3 illustrates the internal sampling frequency Table 1 shows the thermal EMF generated for different versus capacitive loading at Pin 5. resistors. The temperature gradient across the resistor is important, not the ambient temperature. There are two junctions formed at each end of the resistor and if these 3 VS = ± 5V junctions are at the same temperature, their thermal EMFs will cancel each other. The thermal EMF numbers (kHz) S are approximate and vary with resistor value. High values give higher thermal EMF. 2 Table 1. Resistor Thermal EMFRESISTOR TYPETHERMAL EMF/ ° C GRADIENT Tin Oxide ~mV/°C SAMPLING FREQUENCY, f Carbon Composition ~450µV/°C 1 Metal Film ~20µV/°C 1 5 10 100 Wire Wound CAPACITANCE LOADING (pF) Evenohm ~2 1050 F03 µV/°C Manganin ~2µV/°C Figure 3. Sampling Frequency vs Capacitance Loading at Pin 5 1050fb 7
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