LTC3867 BLOCK DIAGRAM MODE/PLLIN ITEMP EXTVCC ITSD 4.7V FREQ TEMPSNS – + VIN F V MODE/SYNC 0.6V IN + DETECT CIN – + 5.3V REG F INTVCC PLL-SYNC INTVCC BOOST BURSTEN TG CB OSC FCNT M1 S SW ON R Q SENSE+ DB 3k SWITCH + – LOGIC AND L1 SENSE– ICOMP IREV ANTISHOOT- VOUT – + THROUGH + IFAST BG RUN M2 COUT IFAST OV PGND CVCC ILIM PGOOD SLOPE COMPENSATION DIFFOUT DIFF+ + 0.555V + 1/2 INTVCC UVLO UV V DIFFAMP FB 1 – – 51k SLOPE RECOVERY ITHB ACTIVE CLAMP DIFF– 20k 20k + SLEEP OV 3867 BD – 0.645V VIN – SS + – RUN + 1.25µA SGND EA 0.6V – + + + – REF 0.5V 1.22V 0.55V 1.0µA/5.0µA ITH C R C1 RUN TK/SS CSS C OPERATION Main Control Loop current at which ICMP resets the RS latch is controlled by The LTC3867 uses a constant frequency, current mode the voltage on the ITH pin, which is the output of the er- step-down architecture. During normal operation, the ror amplifier, EA. The remote sense amplifier (DIFFAMP) top MOSFET is turned on every cycle when the oscillator produces a signal equal to the differential voltage sensed sets the RS latch, and turned off when the main current across the output capacitor divided down by the feedback comparator, I divider and re-references it to the local IC ground reference. CMP , resets the RS latch. The peak inductor 3867f 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Package Description Typical Application Related Parts
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