LTC3857-1 PIN FUNCTIONS ITH1, ITH2 (Pin 1, Pin 13): Error Amplifier Outputs and invokes Burst Mode operation when the pin is floated. Switching Regulator Compensation Points. Each associ- Tying this pin to INTVCC forces continuous inductor current ated channel’s current comparator trip point increases operation. Tying this pin to a voltage greater than 1.2V and with this control voltage. less than INTVCC – 1.3V selects pulse-skipping operation. V This can be done by adding a 100k resistor between the FB1, VFB2 (Pin 2, Pin 12): Receives the remotely sensed feedback voltage for each controller from an external PLLIN/MODE pin and INTVCC. resistive divider across the output. SGND (Pin 7): Small-signal ground common to both SENSE1+, SENSE2+ (Pin 3, Pin 11): The (+) input to the controllers, must be routed separately from high current differential current comparators are normally connected grounds to the common (–) terminals of the CIN capacitors. to DCR sensing networks or current sensing resistors. RUN1, RUN2 (Pin 8, Pin 9): Digital Run Control Inputs for The ITH pin voltage and controlled offsets between the Each Controller. Forcing either of these pins below 1.26V SENSE– and SENSE+ pins in conjunction with RSENSE set shuts down that controller. Forcing both of these pins below the current trip threshold. 0.7V shuts down the entire LTC3857-1, reducing quiescent SENSE1–, SENSE2– (Pin 4, Pin 10): The (–) Input to current to approximately 8μA. Do not float these pins. the Differential Current Comparators. When greater than INTVCC (Pin 19): Output of the Internal Linear Low Dropout INTVCC – 0.5V, the SENSE– pin supplies current to the Regulator. The driver and control circuits are powered from current comparator. this voltage source. Must be decoupled to power ground FREQ (Pin 5): The Frequency Control Pin for the Internal with a minimum of 4.7μF ceramic or other low ESR ca- VCO. Connecting the pin to GND forces the VCO to a fixed pacitor. Do not use the INTVCC pin for any other purpose. low frequency of 350kHz. Connecting the pin to INTVCC EXTVCC (Pin 20): External Power Input to an Internal LDO forces the VCO to a fixed high frequency of 535kHz. Connected to INTVCC. This LDO supplies INTVCC power, Other frequencies between 50kHz and 900kHz can be bypassing the internal LDO powered from VIN whenever programmed using a resistor between FREQ and GND. EXTVCC is higher than 4.7V. See EXTVCC Connection in An internal 20μA pull-up current develops the voltage to the Applications Information section. Do not exceed 14V be used by the VCO to control the frequency on this pin. PLLIN/MODE (Pin 6): External Synchronization Input to PGND (Pin 21): Driver Power Ground. Connects to the Phase Detector and Forced Continuous Mode Input. When sources of bottom (synchronous) N-channel MOSFETs an external clock is applied to this pin, the phase-locked and the (–) terminal(s) of CIN. loop will force the rising TG1 signal to be synchronized V with the rising edge of the external clock. When not syn- IN (Pin 22): Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin. chronizing to an external clock, this input, which acts on both controllers, determines how the LTC3857-1 operates BG1, BG2 (Pin 23, Pin 18): High Current Gate Drives at light loads. Pulling this pin to ground selects Burst for Bottom (Synchronous) N-Channel MOSFETs. Voltage Mode operation. An internal 100k resistor to ground also swing at these pins is from ground to INTVCC. 38571fc 8 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS
