Datasheet AD8372 (Analog Devices) - 7

Data Sheet AD8372 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 D1 1 1 1 1 C F T D1 B S DG INC1 IP RE RX AG EN AV PIN 1 INDICATOR 32 31 30 29 28 27 26 25 DVS1 1 24 OPC1 LCH1 2 23 ONC1 SDI1 3 22 AGD1 AD8372 CLK1 4 21 SDO1 CLK2 5 TOP VIEW 20 SDO2 SDI2 6 (Not to Scale) 19 AGD2 LCH2 7 18 ONC2 DVS2 8 17 OPC2 9 10 11 12 13 14 15 16 2 2 2 2 2 2 D2 C C F T D2 B S DG IN IP RE RX AG EN AV NOTES
2 00
1. THE EXPOSED PAD SHOULD BE CONNECTED
1- 05
TO AGD1 AND AGD2.
07 Figure 4. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 DVS1 Digital Supply Pin for Channel 1 2 LCH1 Latch Input for Channel 1 3 SDI1 Serial Data Input for Channel 1 4 CLK1 Clock Input for Channel 1 5 CLK2 Clock Input for Channel 2 6 SDI2 Serial Data Input for Channel 2 7 LCH2 Serial Data Input for Channel 2 Latch Input for Channel 2 8 DVS2 Digital Supply Pin for Channel 2 9 DGD2 Digital Ground for Channel 2 10 INC2 Negative Input for Channel 2 11 IPC2 Positive Input for Channel 2 12 REF2 Reference Voltage for Channel 2 13 RXT2 External Bias Setting Resistor Connection for Channel 2 14 AGD2 Analog Ground for Channel 2 15 ENB2 Chip Enable Pin for Channel 2 16 AVS2 Analog Supply Pin for Channel 2 17 OPC2 Positive Output for Channel 2 18 ONC2 Negative Output for Channel 2 19 AGD2 Analog Ground for Channel 2 20 SDO2 Serial Data Output for Channel 2 21 SDO1 Serial Data Output for Channel 1 22 AGD1 Analog Ground for Channel 1 23 ONC1 Negative Output for Channel 1 24 OPC1 Positive Output for Channel 1 25 AVS1 Analog Supply Pin for Channel 1 26 ENB1 Chip Enable Pin for Channel 1 27 AGD1 Analog Ground for Channel 1 28 RXT1 External Bias Setting Resistor Connection for Channel 1 29 REF1 Reference Voltage for Channel 1 30 IPC1 Positive Input for Channel 1 31 INC1 Negative Input for Channel 1 32 DGD1 Digital Ground for Channel 1 EPAD Exposed Pad. The exposed pad should be connected to AGD1 and AGD2. Rev. C | Page 7 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS SERIAL CONTROL INTERFACE TIMING ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SINGLE-ENDED AND DIFFERENTIAL SIGNALS PASSIVE FILTER TECHNIQUES DIGITAL GAIN CONTROL DRIVING ANALOG-TO-DIGITAL CONVERTERS EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE