Datasheet AD8375 (Analog Devices) - 6

AD8375 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS M S M M M P M O M M M U O P O O O W C V C C C P 4 3 2 1 0 2 2 2 2 9 2 1 VCOM 1 18 VOUT– VIN+ 2 17 VOUT+ VIN– 3 AD8375 16 VOUT– A4 4 TOP VIEW 15 VOUT+ (Not to Scale) A3 5 14 COMM A2 6 13 VPOS 7 8 9 01 11 21 1 0 S S S A A M O O O P M P P V O V C V
002
NOTES
4-
1. THE EXPOSED PAD IS INTERNALLY CONNECTED TO GROUND. SOLDER TO A LOW IMPEDANCE GROUND PLANE.
0672 Figure 3. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 VCOM Common-Mode Pin. Typically bypassed to ground using external capacitor. 2 VIN+ Voltage Input Positive. 3 VIN− Voltage Input Negative. 4 A4 MSB for the 5-Bit Gain Control Interface. 5 A3 MSB − 1 for the Gain Control Interface. 6 A2 MSB − 2 for the Gain Control Interface. 7 A1 LSB + 1 for the Gain Control Interface. 8 A0 LSB for the 5-Bit Gain Control Interface. 9, 10, 12, 13, 23 VPOS Positive Supply Pins. Should be bypassed to ground using suitable bypass capacitor. 11, 14, 20, 21, 22, 24 COMM Device Common (DC Ground). 15, 17 VOUT+ Positive Output Pins (Open Collector). Require dc bias of +5 V nominal. 16, 18 VOUT− Negative Output Pins (Open Collector). Require dc bias of +5 V nominal. 19 PWUP Chip Enable Pin. Enabled with a logic high and disabled with a logic low. EPAD Exposed Pad. The Exposed Pad is internally connected to ground. Solder to a low impedance ground plane. Rev. B | Page 6 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION BASIC STRUCTURE Input System Output Amplifier Gain Control APPLICATIONS BASIC CONNECTIONS SINGLE-ENDED-TO-DIFFERENTIAL CONVERSION BROADBAND OPERATION ADC INTERFACING LAYOUT CONSIDERATIONS CHARACTERIZATION TEST CIRCUITS Differential-to-Differential Characterization EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE