Datasheet AD8351 (Analog Devices) - 6

AD8351-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS UP CM W O P NC NC V 16 15 14 13 RGP1 1 12 VPOS INHI 2 AD8351-EP 11 OPHI TOP VIEW INLO 3 10 OPLO (Not to Scale) RGP2 4 9 COMM 5 6 7 8 NC NC NC NC NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO
003
GND AND MUST BE SOLDERED TO A LOW IMPEDANCE GROUND PLANE.
14821- Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 RGP1 Gain Resistor Input 1. 2 INHI Balanced Differential Input, High. Biased to midsupply, typically ac-coupled. 3 INLO Balanced Differential Input, Low. Biased to midsupply, typically ac-coupled. 4 RGP2 Gain Resistor Input 2. 5, 6, 7, 8, 14, 15 NC No Connect. Do not connect to this pin. 9 COMM Device Common. Connect this pin to a low impedance ground. 10 OPLO Balanced Differential Output, Low. Biased to VOCM, typically ac-coupled. 11 OPHI Balanced Differential Output, High. Biased to VOCM, typically ac-coupled. 12 VPOS Positive Supply Voltage. 3 V to 5.5 V. 13 VOCM Input/Output Common-Mode Voltage. The voltage applied to this pin sets the common-mode voltage at both the input and output. This pin is typically decoupled to ground with a 0.1 µF capacitor. 16 PWUP Apply a positive voltage (1.3 V ≤ VPWUP ≤ VPOS) to activate the device. EPAD Exposed Pad. The exposed pad is internally connected to GND and must be soldered to a low impedance ground plane. Rev. A | Page 6 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE