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Datasheet AD8232 (Analog Devices) - 25

ПроизводительAnalog Devices
ОписаниеSingle-Lead, Heart Rate Monitor Front End
Страниц / Страница28 / 25 — Data Sheet. AD8232. PORTABLE CARDIAC MONITOR WITH ELIMINA-. TION OF …
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Язык документаанглийский

Data Sheet. AD8232. PORTABLE CARDIAC MONITOR WITH ELIMINA-. TION OF MOTION ARTIFACTS. CARDIAC MONITOR CONFIGURATION. 0.33µF. +VS

Data Sheet AD8232 PORTABLE CARDIAC MONITOR WITH ELIMINA- TION OF MOTION ARTIFACTS CARDIAC MONITOR CONFIGURATION 0.33µF +VS

Текстовая версия документа

link to page 26
Data Sheet AD8232
The overall narrow-band nature of this filter combination In addition to 40 Hz filtering, the op amp stage is configured for distorts the ECG waveform significantly. Therefore, it is only a gain of 11, resulting in a total system gain of 1100. To suitable to determine the heart rate, and not to analyze the ECG optimize the dynamic range of the system, the gain level is signal characteristics. adjustable, depending on the input signal amplitude (which The low-pass filter stage also includes a gain of 11, to bring the may vary with electrode placement) and ADC input range. total system gain close to 1100 (note that the filter roll off
PORTABLE CARDIAC MONITOR WITH ELIMINA-
prevents the maximum gain from reaching this value). Because
TION OF MOTION ARTIFACTS
the ECG signal is measured at the hands, it is weaker than when The circuit in Figure 68 shows an implementation of a battery- measured closer to the heart. powered embedded system for monitoring heart rate in The RLD circuit drives to the third electrode, which can also be applications where the patient engages in moderate activity, located at the hands, to cancel common-mode interference. such as with a Holter monitor. The AD8232 uses a three-
CARDIAC MONITOR CONFIGURATION
electrode patient interface and implements a two-pole high- pass filter with a cutoff at 0.3 Hz, and a two-pole low-pass filter This configuration is designed for monitoring the shape of the with a cutoff frequency of 37 Hz. The total signal gain in the ECG waveform. It assumes that the patient remains relatively pass band is 400. The fully conditioned signal is sampled by the still during the measurement, and therefore, motion artifacts sigma-delta ADC integrated on the low power microcontroller, are less of an issue. ADuCM360. The wide dynamic range of this ADC provides flexibility to reduce the signal gain to avoid saturation, depending
0.33µF
on electrode placement.
+VS 0.33µF REFOUT
Because the pass band is relatively wide for ambulatory applica-
10MΩ 10MΩ 1.4MΩ HPDRIVE HPSENSE
tions, the ADXL346 accelerometer signal can be used to further
10MΩ 180kΩ 10MΩ
minimize the noise introduced by the motion of the patient.
LA +IN IAOUT +V 180kΩ S
Moreover, the microcontroller can use the motion information
RA –IN REFIN 10MΩ 0.1µF
to monitor inactivity and to issue a system shutdown to save
RLDFB +VS 10MΩ 1nF 0.1µF 360kΩ
battery power.
RL RLD GND AD8232
The low dropout regulator ensures that the maximum of 3 V is
SW FR +VS 1MΩ 1MΩ
not exceeded, especially during charge cycles of the battery,
OPAMP+ AC/DC 10nF
which can be a lithium-ion cell.
REFOUT SDN 100kΩ TO DIGITAL
In this application, the ADuCM360 uses its Port 0 to perform
1.5nF OPAMP– LO+ 1MΩ INTERFACE
DMA transfers to the host communication interface or to an
OUT LO–
6 26 on-board memory, if recording the waveform for later transfer. 66-
SIGNAL OUTPUT
108 However, in any particular application, this port should be used Figure 66. Circuit for ECG Waveform Monitoring for the busiest interface to minimize CPU cycles and maintain low power operation. To obtain an ECG waveform with minimal distortion, the AD8232 is configured with a 0.5 Hz two-pole high-pass filter Note that this circuit is shown to demonstrate the capabilities of followed by a two-pole, 40 Hz, low-pass filter. A third electrode AD8232 and other system components. It is not a complete is driven for optimum common-mode rejection. system design and additional effort must be made to ensure
70
compliance with medical safety guidelines from regulatory agencies.
60 50 B) (d E 40 UD IT N 30 G A M 20 10 00.01 0.1 1 10 100 1k
061 66-
FREQUENCY (Hz)
108 Figure 67. Frequency Response of Cardiac Monitor Circuit Rev. C | Page 25 of 28 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Instrumentation Amplifier Performance Curves Operational Amplifier Performance Curves Right Leg Drive (RLD) Amplifier Performance Curves Reference Buffer Performance Curves System Performance Curves Theory of Operation Architecture Overview Instrumentation Amplifier Operational Amplifier Right Leg Drive Amplifier Reference Buffer Fast Restore Circuit Leads Off Detection DC Leads Off Detection AC Leads Off Detection Standby Operation Input Protection Radio Frequency Interference (RFI) Power Supply Regulation and Bypassing Input Referred Offsets Layout Recommendations Applications Information Eliminating Electrode Offsets High-Pass Filtering Two-Pole High-Pass Filter Additional High-Pass Filtering Options Low-Pass Filtering and Gain Driving Analog-to-Digital Converters Driven Electrode Application Circuits Heart Rate Measurement Next to the Heart Exercise Application: Heart Rate Measured at the Hands Cardiac Monitor Configuration Portable Cardiac Monitor with Elimination of Motion Artifacts Packaging and Ordering Information Outline Dimensions Ordering Guide
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