Datasheet LTC7124 (Analog Devices) - 8

LTC7124
BLOCK DIAGRAM
1.1ms SOFT-START BOOST1 SLOPE ERROR COMPENSATION + AMPLIFIER V FB1 0.6V + + IN1 + – – – SLEEP MAIN COMP COMPARATOR I-COMPARATOR SELECT ITH1 OVERCURRENT R BUCK COMPARATOR TH1 R LOGIC C INT + SW1 TH1 AND CINT GATE – DRIVE RUN1 INTVCC PGOOD1 + REVERSE – COMPARATOR GND VIN1 MODE/SYNC MODE INTVCC SELECT LDO SYNC PLL AND RT OSCILLATOR CURRENT ILIM LIMIT R SELECT RT 1.1ms SOFT-START BOOST2 SLOPE ERROR COMPENSATION + AMPLIFIER VIN2 FB2 0.6V + + + – – – SLEEP MAIN COMPARATOR I-COMPARATOR COMP SELECT ITH2 OVERCURRENT RTH2 BUCK COMPARATOR R LOGIC C INT + SW2 TH2 AND CINT GATE – DRIVE RUN2 INTVCC PGOOD2 + REVERSE – COMPARATOR GND GND 7124 BD 7124fa 8 For more information www.linear.com/LTC7124