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Datasheet ADP2230 (Analog Devices) - 6

ПроизводительAnalog Devices
ОписаниеDual 2 MHz, 800 mA, Synchronous, Low Quiescent Current Buck Regulator
Страниц / Страница18 / 6 — ADP2230. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SW1 1. …
ВерсияA
Формат / Размер файлаPDF / 737 Кб
Язык документаанглийский

ADP2230. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SW1 1. 10 SW2. VIN1 2. VIN2. FB1 3. FB2. TOP VIEW. EN1 4. EN2. AGND 5. PGND. SYNC

ADP2230 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SW1 1 10 SW2 VIN1 2 VIN2 FB1 3 FB2 TOP VIEW EN1 4 EN2 AGND 5 PGND SYNC

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ADP2230 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SW1 1 10 SW2 VIN1 2 9 VIN2 ADP2230 FB1 3 8 FB2 TOP VIEW EN1 4 7 EN2 11 AGND 5 PGND 6 SYNC NOTES 1. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP PACKAGE ENHANCES THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO PGND INSIDE THE PACKAGE. THE EXPOSED PAD MUST BE CONNECTED TO THE
002
GROUND PLANE ON THE BOARD FOR PROPER OPERATION.
10705- Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 SW1 Connection from MOSFET Power Switches to the Inductor for Buck 1. 2 VIN1 Analog and Power Voltage Input for Buck 1. Connect VIN1 to VIN2. 3 FB1 Output Voltage Feedback for Buck 1. 4 EN1 Precision Enable for Buck 1. Do not leave the EN1 pin floating. 5 AGND Analog Ground. 6 SYNC Frequency Synchronization. Drive SYNC high to force the device to operate in 2 MHz fixed PWM mode. Drive SYNC low to force the device to operate in 2 MHz PSM/PWM automatic transitioning mode. Apply an external clock between 1.5 MHz and 2.5 MHz to the SYNC pin to synchronize the ADP2230 switching to the applied external clock. Do not leave the SYNC pin floating. 7 EN2 Precision Enable for Buck 2. Do not leave the EN2 pin floating. 8 FB2 Output Voltage Feedback for Buck 2. 9 VIN2 Analog and Power Voltage Input for Buck 2. Connect VIN2 to VIN1. 10 SW2 Connection from MOSFET Power Switches to the Inductor for Buck 2. 11 EPAD Exposed Pad, Power Ground (PGND). The exposed pad on the bottom of the LFCSP package enhances thermal performance and is electrically connected to PGND inside the package. The exposed pad must be connected to the ground plane on the board for proper operation. Rev. A | Page 6 of 18 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED COMPONENT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OVERVIEW OPERATING CONDITIONS Input Voltage Output Voltage SYNC PIN CONTROL SCHEMES PWM Mode PSM/PWM Automatic Transitioning Mode External Clock Synchronization FEATURES DESCRIPTIONS Precision Enable Quick Output Discharge Output Short-Circuit Protection Undervoltage Lockout Thermal Shutdown Soft Start Current Limit 100% Duty Cycle APPLICATIONS INFORMATION SETTING THE OUTPUT VOLTAGE SELECTING THE INDUCTOR SELECTING THE INPUT AND OUTPUT CAPACITORS Input Capacitor Output Capacitor PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
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