Datasheet ADP5052 (Analog Devices) - 7

Data Sheet ADP5052 LDO REGULATOR SPECIFICATIONS
VIN5 = (VOUT5 + 0.5 V) or 1.7 V (whichever is greater) to 5.5 V; CIN = COUT = 1 µF; TJ = −40°C to +125°C for minimum and maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 4. Parameter Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE 1.7 5.5 V PVIN5 pin OPERATIONAL SUPPLY CURRENT Bias Current for LDO Regulator 30 130 µA IOUT5 = 200 µA 60 170 µA IOUT5 = 10 mA 145 320 µA IOUT5 = 200 mA VOLTAGE FEEDBACK (FB5 PIN) Adjustable Feedback Voltage 0.500 V Feedback Voltage Accuracy −1.0 +1.0 % TJ = 25°C −1.6 +1.6 % 0°C ≤ TJ ≤ 85°C −2.0 +2.0 % −40°C ≤ TJ ≤ +125°C DROPOUT VOLTAGE IOUT5 = 200 mA 80 mV VOUT5 = 3.3 V 100 mV VOUT5 = 2.5 V 180 mV VOUT5 = 1.5 V CURRENT-LIMIT THRESHOLD 250 510 mA Specified from the output voltage drop to 90% of the specified typical value OUTPUT NOISE 92 µV rms 10 Hz to 100 kHz, VPVIN5 = 5 V, VOUT5 = 1.8 V POWER SUPPLY REJECTION RATIO VPVIN5 = 5 V, VOUT5 = 1.8 V, IOUT5 = 1 mA 77 dB 10 kHz 66 dB 100 kHz Rev. D | Page 7 of 36 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS LDO REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode Forced PWM and Automatic PWM/PSM Modes ADJUSTABLE AND FIXED OUTPUT VOLTAGES INTERNAL REGULATORS (VREG AND VDD) SEPARATE SUPPLY APPLICATIONS LOW-SIDE DEVICE SELECTION BOOTSTRAP CIRCUITRY ACTIVE OUTPUT DISCHARGE SWITCH PRECISION ENABLING OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT SOFT START PARALLEL OPERATION STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLDBACK Pulse Skip Mode Under Maximum Duty Cycle HICCUP PROTECTION LATCH-OFF PROTECTION Short-Circuit Latch-Off Mode Overvoltage Latch-Off Mode UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FUNCTION THERMAL SHUTDOWN LDO REGULATOR APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL PROGRAMMING THE ADJUSTABLE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION LOW-SIDE POWER DEVICE SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown LDO Regulator Power Dissipation JUNCTION TEMPERATURE DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CURRENT LIMIT SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR SELECTING THE LOW-SIDE MOSFET DESIGNING THE COMPENSATION NETWORK SELECTING THE SOFT START TIME SELECTING THE INPUT CAPACITOR RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE