Datasheet LTC3103 (Analog Devices) - 8

LTC3103
BLOCK DIAGRAM
1 C2 VIN VCC VCC PRE-REG VCC 6 BST VCC BOOST 3 C3 IBIAS UVLO OSC IPEAK(REF) – C I BST 0.6V 0.8V I PEAK PEAK COMP UVLO + R6 VREF V TOP_ON REF_GOOD RUN 7 + L1 SHUTDOWN CONTROL ANTICROSS SW 2 VOUT R5 SD LOGIC LOGIC BOT_ON CONDUCT BURST ENABLE C1 0.8V – + I TSD ZERO MODE COMP 10 – THERMAL SHUTDOWN 9 NC + + PWM PWM COMP SLOPE COMP – + 0.6V gm + SS R2 – FB + 8 SLEEP R1 COMP – SLEEP REF PGOOD – 5 0.6V – 10% + GND 4 3103 BD 3103fa 8 For more information www.linear.com/LTC3103 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts