Datasheet LT3694, LT3694-1 (Analog Devices) - 8

LT3694/LT3694-1
BLOCK DIAGRAM
RT SYNC CLKOUT BIAS (LT3694) (LT3694-1) OUT1 CLK VIN PGOOD EN/UVLO + INT REG MASTER OVERVOLTAGE 0.5V AND REF OSC SHUTDOWN – – + THERMAL 1.2V SHUTDOWN
LDO
60mV OUT1 60mV
LDO
– OUT1 – RLIM3 + LIM3 RLIM2 PG1 LIM2 + DRV3 DRV2 3µA 3µA TRK/SS3 + OUT3 OUT2 TRK/SS2 SD + 0.75V + SD 0.75V + FB3 – FB2 – – 0.68V – + 0.68V +
BUCK
VIN VIN + C BIAS IN 0.9V – Σ + BST R – S O SLOPE COMP C3 SW L1 CLK OUT1 C1 D1 DA + – – FB1 R1 VC1 ERROR + AMP R2 C + f R 0.75V C – 3µA CC ILIMIT CLAMP GND + – 0.68V TRK/SS1 2V PG1 + 36941 F01
Figure 1. LT3694 Block Diagram with Typical External Components
36941fb 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts