Datasheet LT1913 (Analog Devices) - 7

LT1913
U U U PI FU CTIO S BD (Pin 1):
This pin connects to the anode of the boost
SYNC (Pin 6):
This is the external clock synchronization Schottky diode. BD also supplies current to the internal input. Ground this pin when not used. Tie to a clock source regulator. for synchronization. Clock edges should have rise and fall times faster than 1μs. Do not leave pin fl oating. See
BOOST (Pin 2):
This pin is used to provide a drive synchronizing section in Applications Information. voltage, higher than the input voltage, to the internal bipolar NPN power switch.
PG (Pin 7):
The PG pin is the open collector output of an internal comparator. PG remains low until the FB pin is
SW (Pin 3):
The SW pin is the output of the internal power within 9% of the fi nal regulation voltage. PG output is valid switch. Connect this pin to the inductor, catch diode and when V boost capacitor. IN is above 3.6V and RUN/SS is high.
FB (Pin 8):
The LT1913 regulates the FB pin to 0.790V.
VIN (Pin 4):
The VIN pin supplies current to the LT1913’s Connect the feedback resistor divider tap to this pin. internal regulator and to the internal power switch. This pin must be locally bypassed.
VC (Pin 9):
The VC pin is the output of the internal error amplifi er. The voltage on this pin controls the peak switch
RUN/SS (Pin 5):
The RUN/SS pin is used to put the current. Tie an RC network from this pin to ground to LT1913 in shutdown mode. Tie to ground to shut down compensate the control loop. the LT1913. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN
RT (Pin 10):
Oscillator Resistor Input. Connecting a resistor pin. RUN/SS also provides a soft-start function; see the to ground from this pin sets the switching frequency. Applications Information section.
Exposed Pad (Pin 11):
Ground. The Exposed Pad must be soldered to PCB. 1913f 7