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Datasheet LTC3447 (Analog Devices) - 7

ПроизводительAnalog Devices
ОписаниеI2C Controllable Buck Regulator in 3mm × 3mm DFN
Страниц / Страница16 / 7 — OPERATIO. BUCK OPERATION. Pulse Skipping Mode Operation. Figure 3. …
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Язык документаанглийский

OPERATIO. BUCK OPERATION. Pulse Skipping Mode Operation. Figure 3. LTC3447 Buck Regulator Diagram. Main Control Loop

OPERATIO BUCK OPERATION Pulse Skipping Mode Operation Figure 3 LTC3447 Buck Regulator Diagram Main Control Loop

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LTC3447
U OPERATIO BUCK OPERATION
50mA. When below this level, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent VIN current to 33µA, and the peak current level reference level VFB PEAK CURRENT LEVEL REF EA is held at 150mA. The LTC3447 remains in this sleep state VREF until the output voltage falls below the output voltage set- ting. Once this occurs, the regulator wakes up and allows I RS COMP RS the inductor to develop 150mA current pulses. For light LATCH OSC S Q loads, this will cause the output voltage to increase and the PFET internal peak current reference to decrease. When the peak R QB SW current reference falls to below 50mA, the part re-enters LOGIC NFET sleep mode and the cycle is repeated. This process repeats BURST at a rate that is dependent on the load demand. IRCMP
Pulse Skipping Mode Operation
At light loads, the inductor current may reach zero or BUCK REGULATOR reverse on each pulse. The bottom MOSFET is turned off 3447 AI01
Figure 3. LTC3447 Buck Regulator Diagram
by the current reversal comparator, IRCMP, and the switch voltage will ring. This is discontinuous mode operation,
Main Control Loop
and is normal behavior for a switching regulator. At very light loads, the LTC3447 will automatically skip pulses The LTC3447 uses current mode step-down architecture in pulse skipping mode operation to maintain output with both the main (P-channel MOSFET) and synchronous regulation. This feature is enabled when the Burst Mode (N-channel MOSFET) switches internal. During normal operation is disabled. operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and
Short-Circuit Protection
turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which I When the output is shorted to ground, the frequency of COMP resets the RS latch, is controlled by the output of error the oscillator is reduced to about 160kHz. This frequency amplifi er EA. When the load current increases, it causes foldback ensures that the inductor current has more a slight decrease in the feedback voltage, FB, relative to time to decay, thereby preventing thermal runaway. The an internal reference voltage, which in turn, causes the oscillator’s frequency will progressively increase to 1MHz EA amplifi er’s output voltage to increase until the average when VOUT rises above 0V. inductor current matches the new load current. While the
Dropout Operation
top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated When using the optional external feedback resistors, it is by the current reversal comparator IRCMP, or the beginning possible for VIN to approach the output voltage level. As of the next clock cycle. the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the
Burst Mode Operation
maximum on-time. Further reduction of the supply voltage The LTC3447 is capable of Burst Mode operation in which forces the main switch to remain on for more than one cycle the internal power MOSFETs operate intermittently based until it reaches 100% duty cycle. The output voltage will on load demand. Burst Mode operation can be disabled via then be determined by the input voltage minus the voltage the I2C interface. When Burst Mode operation is disabled, drop across the P-channel MOSFET and the inductor. the regulator is in pulse skipping mode operation. An important detail to remember is that at low input supply During Burst Mode operation, the LTC3447’s internal voltages, the RDS(ON) of the P-channel switch increases circuits sense when the inductor peak current falls below (see Typical Performance Characteristics). Therefore, 3447f 7
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