Datasheet LT1941 (Analog Devices) - 9

LT1941
BLOCK DIAGRAM
VIN 5GOOD BIAS1 + VIN 4.5V – 2μA RUN/SS1 CLK1 INT REG MASTER 12GOOD AND REF CLK2 OSC CLK3 + 2μA RUN/SS2 10.8V – VIN RUN/SS3 2μA VIN CIN + 0.9V – ¤ + BOOST D2 SLOPE R – S Q C1 SLAVE C3 OSC CLK SW L1 OUT
wo Step-Down Switching Regulators
+ D1 C1 – 0.35V – FB R1
One of T
VC ERROR R2 AMP + CF RC – 0.628V RUN/SS CC ILIMIT +CLAMP 54mV PGOOD 1.7V + GND – VIN BIAS2 BOOST VC3 L3 SW3 D3 C2 – SW3 VOUT3 RUN/SS DRIVER C4 R Q Q1 S + + + V 1.25V IN ERROR 0.01Ω 3 PGND INVERTING FB3 – – AMP L4A VOUT3 L4B RAMP R3 SW3 –V GENERATOR OUT3 FOR (EXTERNAL) + D4 C5 C6 POSITIVE FB3 0.4V OUTPUTS NFB SLAVE R4 OSCILLATOR (EXTERNAL) – CLK3 FB3 + R3 FOR (EXTERNAL) NEGATIVE NFB R4 – OUTPUTS 0.6V (EXTERNAL)
Inverting/Boost Switching Regulator
NFB – –VOUT3 PGOOD3 + + – 1.12V 1941 F02
Figure 2. Block Diagram of the LT1941 with Associated External Components
1941fb 9