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Datasheet LTC3618 (Analog Devices)

ПроизводительAnalog Devices
ОписаниеDual 4MHz, ±3A Synchronous Buck Converter for DDR Termination
Страниц / Страница24 / 1 — FeaTures. DescripTion. DDR Power Supply, Termination and Reference. High …
Формат / Размер файлаPDF / 633 Кб
Язык документаанглийский

FeaTures. DescripTion. DDR Power Supply, Termination and Reference. High Efficiency: Up to 94%

Datasheet LTC3618 Analog Devices

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LTC3618 Dual 4MHz, ±3A Synchronous Buck Converter for DDR Termination
FeaTures DescripTion
n
DDR Power Supply, Termination and Reference
The LTC®3618 is a dual synchronous step-down regulator n
High Efficiency: Up to 94%
using a current mode, constant-frequency architecture. It n
Dual Outputs with ±3A Output Current Capability
provides a complete DDR solution with an input voltage n
2.25V to 5.5V Input Voltage Range
range from 2.25V to 5.5V. n
±1% Output Voltage Accuracy
The output of the first step-down regulator offers a high n
VTT Output Voltage Down to 0.5V
accuracy V n DDQ supply. A buffered reference generates Shutdown Current ≤1µA VTTR at 50% of VDDQIN and drives loads up to ±10mA. n VTTR = VDDQIN/2, VFB2 = VTTR The second regulator generates the DDR termination volt- n Adjustable Switching Frequency Up to 4MHz age (V n TT) equal to VTTR. Both regulators are capable of Internal or External Compensation delivering ±3A of load current at 1MHz switching frequency. n Selectable 0°/90°/180° Phase Shift Between Channels n Internal or External Soft-Start for V The operating frequency is externally programmable up to DDQ, Internal Soft-Start for V 4MHz, allowing the use of small surface mount inductors. TT n Power Good Status Outputs 0°, 90°, or 180° of phase shift between the two channels n Low Profile 4mm × 4mm QFN-24 and TSSOP-24 can be selected to minimize input current ripple. For Packages switching noise-sensitive applications, the LTC3618 can be synchronized to an external clock up to 4MHz.
applicaTions
The LTC3618 is offered in leadless 24-pin 4mm × 4mm n DDR Memory QFN and thermally enhanced 24-pin TSSOP packages. n Supports DDR, DDR2, and DDR3 Standards L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Tracking Supplies Protected by U.S. Patents, including 5481178, 6498466, 6580258, 6611131.
Typical applicaTion
VIN
Efficiency and Power Loss vs Load Current
3.3V 100µF SV 100 10 IN PVIN1 PVIN2 VDDQIN 90 RUN1 VDDQ = 1.8V 1µH VDDQ 80 TRACK/SS1 SW1 1.8V/3A 70 POWER LOSS (W) 47µF 422k 1 PGOOD1 60 LTC3618 ITH1 FB1 VTT = 0.9V 50 RT 210k 40 392k MODE/SYNC 1µH V EFFICIENCY (%) TT 0.1 SW2 30 PHASE 0.9V/±3A 47µF 20 RUN2 FB2 10 PGOOD2 0 0.01 ITH2 0.01 0.1 1 10 V V DDQ REF = VTTR LOAD CURRENT (A) 2 3618 TA01b SGND PGND 3618 TA01a 0.01µF 3618fc For more information www.linear.com/LTC3618 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
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