Datasheet LTC3858-1 (Analog Devices) - 8

LTC3858-1
TYPICAL PERFORMANCE CHARACTERISTICS Latchoff Threshold Voltage INTVCC vs Load Current vs Temperature
5.20 2.3 VIN = 12V 2.2 5.15 2.1 ARMING THRESHOLD 2.0 1.9 5.10 1.8 EXTV VOLTAGE (V) CC = 0V VOLTAGE (V) 1.7 CC 5.05 CC 1.6 LATCHOFF THRESHOLD INTV INTV EXTVCC = 8V 1.5 5.00 1.4 1.3 4.95 1.2 0 20 40 60 80 100 120 140 160 180 200 –45 –20 5 30 55 80 105 130 LOAD CURRENT (mA) TEMPERATURE (°C) 3858 G26 3858 G27
PIN FUNCTIONS (QFN/SSOP) SENSE1–, SENSE2– (Pin 2, Pin 8/Pin 4, Pin 10):
The (–) LTC3858-1 operates at light loads. Pulling this pin to Input to the Differential Current Comparators. When greater ground selects Burst Mode operation. An internal 100k than INTVCC – 0.5V, the SENSE– pin supplies current to resistor to ground also invokes Burst Mode operation the current comparator. when the pin is fl oated. Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to
FREQ (Pin 3/Pin 5):
The Frequency Control Pin for the a voltage greater than 1.2V and less than INTV Internal Voltage-Contolled Oscillator (VCO). Connecting CC – 1.3V selects pulse-skipping operation. this pin to GND forces the VCO to a fi xed low frequency of 350kHz. Connecting this pin to INTVCC forces the VCO
SGND (Pin 5, Exposed Pad Pin 29/Pin 7):
Small-signal to a fi xed high frequency of 535kHz. Other frequencies ground common to both controllers, must be routed between 50kHz and 900kHz can be programmed using a separately from high current grounds to the common (–) resistor between FREQ and GND. An internal 20μA pull- terminals of the CIN capacitors. The exposed pad (QFN up current develops the voltage to be used by the VCO to only) must be soldered to the PCB for rated thermal control the frequency performance.
PLLIN/MODE (Pin 4/Pin 6):
External Synchronization
RUN1, RUN2 (Pin 6, Pin 7/Pin 8, Pin 9):
Digital Run Input to Phase Detector and Forced Continuous Mode Control Inputs for Each Controller. Forcing either of these Input. When an external clock is applied to this pin, the pins below 1.2V shuts down that controller. Forcing both of phase-locked loop will force the rising TG1 signal to be these pins below 0.7V shuts down the entire LTC3858-1, synchronized with the rising edge of the external clock. reducing quiescent current to approximately 8μA. Do NOT When not synchronizing to an external clock, this input, fl oat these pins. which acts on both controllers, determines how the 38581fd 8