Datasheet AD5227 (Analog Devices) - 6

AD5227 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS CLK 1 8 VDD AD5227 U/D 2 7 CS TOP VIEW A 3 (Not to Scale) 6 B GND 4 5 W
04419-0-003 Figure 5. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 CLK Clock Input. Each clock pulse executes the step-up or step-down of the resistance. The direction is determined by the state of the U/D pin. CLK is a negative-edge trigger. Logic high signal can be higher than VDD, but lower than 5.5 V. 2 U/D Up/Down Selections. Logic 1 selects up and Logic 0 selects down. U can be higher than VDD, but lower than 5.5 V. 3 A Resistor Terminal A. GND ≤ VA ≤ VDD. 4 GND Common Ground. 5 W Wiper Terminal W. GND ≤ VW ≤ VDD. 6 B Resistor Terminal B. GND ≤ VB ≤ VDD. 7 CS Chip Select. Active Low. Logic high signal can be higher than VDD, but lower than 5.5 V. 8 VDD Positive Power Supply, 2.7 V to 5.5 V. Rev. B | Page 6 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY ELECTRICAL CHARACTERISTICS INTERFACE TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PROGRAMMING THE DIGITAL POTENTIOMETERS Rheostat Operation Potentiometer Mode Operation DIGITAL INTERFACE TERMINAL VOLTAGE OPERATION RANGE POWER-UP AND POWER-DOWN SEQUENCES LAYOUT AND POWER SUPPLY BIASING APPLICATIONS MANUAL CONTROL WITH TOGGLE AND PUSHBUTTON SWITCHES MANUAL CONTROL WITH ROTARY ENCODER ADJUSTABLE LED DRIVER ADJUSTABLE CURRENT SOURCE FOR LED DRIVER ADJUSTABLE HIGH POWER LED DRIVER AUTOMATIC LCD PANEL BACKLIGHT CONTROL 6-BIT CONTROLLER CONSTANT BIAS WITH SUPPLY TO RETAIN RESISTANCE SETTING OUTLINE DIMENSIONS ORDERING GUIDE